Specifications

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7
RAMs and Programmable
Devices
This chapter provides details on creating and using RAM (Random Access
Memory), PROM (Programmable Read-Only Memory) and PLA
(Programmable Logic Array) devices with user-specified data.
These devices are created using the PROM/RAM/PLA Wizard. Apart from
this slight difference in terminology, procedures are essentially the same on
both systems. These terms will be used interchangeably in the rest of this
chapter.
The RAM, PROM and PLA Primitive Types
LogicWorks supports the direct simulation of RAM, PROM and PLA
devices as primitives. This means that you can efficiently represent each of
these devices as a single simulation device, rather than having to generate a
circuit built of equivalent logic devices.
The RAM, PROM and PLA devices represent “raw” memory or PLA
(AND-OR) arrays. The primitive device models do not include capability
for registers, feedback, three-state buffers, or other device features. In order
to model these features in industry-standard PLD and PROM types, the
PLD tool automatically generates a subcircuit model made up of a raw
PLA device plus other primitive registers and buffers (etc.) as needed. The
input to the PLD tool is a file that describes the structure of the device. The
format of this file is described in on-line documentation provided with
LogicWorks.
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