Specifications

Logic Devices 117
Creating Synchronized or Offset Clocks
When the Clear Simulation operation is selected (via the Reset button on
the Simulator Palette), all clocks in the design are restarted. Clock outputs
will be set to the low state and the timer for the low period will be restarted.
Clock high and low times, combined with pin inversion and pin delay set-
tings, can be used to precisely determine the relationship between two
clock outputs. The following circuit example summarizes these options.
Setting Clock Values
To set the high and low times for a clock, first select the device in question
(by activating the arrow cursor and clicking inside the device symbol), then
choosing the Simulation Params item on the Simulation menu.
You will be presented with a dialog box with buttons for increasing or
decreasing the high and low values. The minimum for either value is 1 and
the maximum is 32,767.
 See more information on the Simulation Params command in Chapter
12, Menu Reference.
Signal Low Time High Time Invert.Pin Pin Delay
CLK 10 10 0
CLKx2 5 5 0
CLK.INV 10 10 1 0
CLK.DELAY 10 10 5
CLK.INV.DELAY 10 10 1 5
LW Reference.bk Page 117 Monday, December 15, 2003 5:59 PM