Specifications

Gates and Buffers 103
 Close the PartType Configuration dialog and save the part to a library
in the usual manner.
NOTE: 1) The logical inversion of the pin is completely independent of the
graphical representation of the pin. That is, using the “inverted pin” graphic
in the DevEditor does not invert the pin logic in the simulator. You must set
the Invert.Pin field to invert the logic.
2) Inverted gate types NAND and NOR can be created by using the NAND
and NOR primitive type settings. You can also use the AND and OR
settings and either invert the output pin or invert the input pins (using
DeMorgan’s Theorem). These methods will produce identical simulation
results. There is a slight memory overhead, but no execution–speed
overhead, to using an inverted pin.
Transmission Gate
The transmission gate (X–Gate) device behaves as an electrically con-
trolled SPST switch. When the control input is high, any level change
occurring on one signal pin will be passed through to the other. Since the
device has no drive capability of its own, it will behave differently than a
typical logic device when a high impedance or low drive–level signal is
applied to its signal inputs. Most other primitives, such as gates, interpret
any applied input as either High, Low, or Don’t Know. The transmission
gate, on the other hand, will pass through exactly the drive level found on
its opposite pin. Thus, a high impedance level on one pin will be transmit-
ted as a high impedance level on the other pin. Note that the simulation of
this device may produce unpredictable results in extreme cases, such as an
unbroken ring of transmission gates.
NOTE: No variations in number or order of pins are possible with the XGATE
primitive type. It must have exactly one control pin and two bidirectional
pins, with pin order as described in Appendix A, Primitive Device Pin
Summary.
LW Reference.bk Page 103 Monday, December 15, 2003 5:59 PM