User manual

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STAT:QUES:COND?
This query returns the value of the Questionable Condition register. That is a read-only register which holds
the real-time (unlatched) questionable status of the ac source.
Query Syntax: STAT:QUES:COND?
Parameters: None
Examples: STAT:QUES:COND?
Returned Parameters: <NR1> (register value)
Related Commands: STAT:OPER:COND?
STAT:QUES:ENAB
This command sets or reads the value of the Questionable Enable register. This register is a mask for
enabling specific bits from the Questionable Event register to set the questionable summary (QUES) bit of
the Status Byte register. This bit (bit 3) is the logical OR of all the Questionable Event register bits that are
enabled by the Questionable Status Enable register.
Command Syntax: STAT:QUES:ENAB <NRf+>
Parameters: 0 to 32767 | MAX | MIN
Default Value: 0
Examples: STAT:QUES:ENAB<sp>32; STAT:QUES:ENAB<sp>1
Query Syntax: STAT:QUES:ENAB?
Returned Parameters: <NR1> (register value)
Related Commands: STAT:QUES?
*CLS
This command clears the following registers:
1. Standard Event Status.
2. Operation Status Event.
3. Questionable Status Event.
4. Status Byte.
5. Error Queue.
Command Syntax: *CLS
Parameters: None
*ESE
This command programs the Standard Event Status Enable register bits. The programming determines
which events of the Standard Event Status Event register (see *ESR?) are allowed to set the ESB
(EventSummary Bit) of the Status Byte register. A "1" in the bit position enables the corresponding event.
All of the enabled events of the Standard Event Status Event Register are logically ORed to cause the
EventSummary Bit (ESB) of the Status Byte Register to be set.The query reads the Standard Event Status
Enable register.
Bit Configuration of Standard Event Status Enable Register
Bit
Position
7
6
5
4
3
2
2
0
Name
PON
UREQ
CME
EXE
DDE
QYE
Not
Used
OPC
Total
bits
128
64
32
16
8
4
2
1
PON – Power On
UREQ – User Request
CME – Command Error
EXE – Execution Error
DDE – Device Dependent Error
QYE – Query Error
OPC – Operation Complete