Specifications

Si3216
120 Rev. 1.0
Not Recommended
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DOCUMENT CHANGE LIST
Revision 0.61 to Revision 0.9
 Separated the Si3216/15 document into two data
sheets.
 Added Quad Flat No-Lead (QFN) package.
 Removed references to Si3215.
 Updated Figure 11 on page 20.
Changed C18, C19 from 1.0 µF to 4.7 µF.

Updated Figure 13 on page 23.
Changed C10 from 22 nF to 0.1 µF.

Updated Table 11 on page 18.
Changed delay time between chip selects, t
cs
, from 220 ns to
440 ns

Updated Table 41 on page 107.
Changed recommended values for Indirect Register 27 from 6 to
0.

Updated 7."Ordering Guides" on page 114.
Revision 0.9 to Revision 0.91
 Figure 12 on page 22.
Added optional components to application schematic to improve
idle channel noise.

Table 14 on page 22.
Added TO-92 transistor suppliers to BOM.

Table 45, “Evaluation Kit Ordering Guide,” on
page 115.
Updated to include Si3216M-QFN daughter card.

Table 48, “Package Diagram Dimensions,” on
page 118.
Changed A1 from 0.10 to 0.15.

7."Ordering Guides" on page 114.
Updated table to include product revision designator.
Rev. C Si3216 Silicon:
 Register 14. Powerdown Control 1 on page 64.
Changed Bit 3 from “Monitor ADC Power-Off Control” to “PLL
Free-Run Control”
Revision 0.91 to Revision 1.0
 Added chamfered Pin 1 identifier option to Package
Outline: 38-Pin QFN.
 Clarified Ordering Guide
Replaced "X" with revision letter "C" in all ordering codes
requiring a revision letter.
Removed Note 2 from Ordering Guide