Specifications

Si3216
104 Rev. 1.0
Not Recommended
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4. Indirect Registers
Indirect registers are not directly mapped into memory but are accessible through the IDA and IAA registers. A
write to IDA followed by a write to IAA is interpreted as a write request to an indirect register. In this case, the
contents of IDA are written to indirect memory at the location referenced by IAA at the next indirect register update.
A write to IAA without first writing to IDA is interpreted as a read request from an indirect register. In this case, the
value located at IAA is written to IDA at the next indirect register update. Indirect registers are updated at a rate of
16 kHz. For pending indirect register transfers, IAS (direct Register 31) will be one until serviced. In addition, an
interrupt, IND (Register 20), can be generated upon completion of the indirect transfer.
The indirect memory map is different from what is described in the data sheet. The indirect memory map is as
follows:
4.1. Oscillators
See functional description sections of tone generation, ringing, and pulse metering for guidelines on computing
register values. All values are represented in 2s-complement format.
Note: The values of all indirect registers are undefined following the reset state. Shaded areas denote bits that can be read
and written but should be written to zeroes.
Table 35. Si3210 to Si3216 Indirect Register Cross Reference
Si3210
Indirect
Register
Si3216
Indirect
Register
Indirect
Register
Name
Si3210
Indirect
Register
Si3216
Indirect
Register
Indirect
Register
Name
Si3210
Indirect
Register
Si3216
Indirect
Register
Indirect
Register
Name
13 0 OSC1 27 14 ADCG 38 25 NQ34
14 1 OSC1X 28 15 LCRT 39 26 NQ56
15 2 OSC1Y 29 16 RPTP 40 27 VCMR
16 3 OSC2 30 17 CML 41 64 VMIND
17 4 OSC2X 31 18 CMH 43 66 LCRTL
18 5 OSC2Y 32 19 PPT12 99 69 FSK0X
19 6 ROFF 33 20 PPT34 100 70 FSK0
20 7 RCO 34 21 PPT56 101 71 FSK1X
21 8 RNGX 35 22 NCLR 102 72 FSK1
22 9 RNGY 36 23 NRTP 103 73 FSK01
26 13 DACG 37 24 NQ12 104 74 FSK10
Table 36. Oscillator Indirect Registers Summary
Addr.D15D14D13D12D11D10D9D8D7D6D5D4D3D2D1D0
0 OSC1[15:0]
1 OSC1X[15:0]
2 OSC1Y[15:0]
3 OSC2[15:0]
4 OSC2X[15:0]
5 OSC2Y[15:0]
6
ROFF[5:0]