User's Manual

Values are specified in the recommended operating conditions unless otherwise specified.
Symbol Description Min Typ Max Units
1 PCM bit clock frequency 128 2048 kHz
2 PCM bit clock high time 128 ns
3 PCM bit clock low time 209 ns
4 Delay from BT_PCM_CLK rising edge to BT_PCM_SYNC high 50 ns
5 Delay from BT_PCM_CLK rising edge to BT_PCM_SYNC low 50 ns
6 Delay from BT_PCM_CLK rising edge to data valid on BT_PCM_OUT 50 ns
7 Setup time for BT_PCM_IN before BT_PCM_CLK falling edge 50 ns
8 Hold time for BT_PCM_IN after BT_PCM_CLK falling edge 10 ns
9
Delay from falling edge of BT_PCM_CLK during last bit period to
BT_PCM_OUT becoming high impedance
50 ns
Short Frame Sync, Slave Mode
-13-