AW-NH930 IEEE 802.11 a/b/g/n Wireless LAN, Bluetooth and FM Rx Combo Half Mini Card Datasheet Version 0.
Document release Date Modification Initials Approved Version 0.1 Version 0.2 2009/10/23 2009/10/26 N.C. Chen N.C. Chen CE Huang CE Huang Version 0.3 2009/11/05 N.C. Chen CE Huang Version 0.4 2009/11/06 N.C. Chen CE Huang Version 0.5 2010/4/21 N.C. Chen CE Huang Version 0.6 2010/6/02 N.C. Chen CE Huang Version 0.7 2010/12/14 N.C. Chen CE Huang Version 0.
Table of Contents 1. General Description 1-1.Product Overview and Functional Description 1-2. Key Features 1-3. Specifications Table 2. Electrical Characteristic 2-1. Absolute Maximum Ratings 2-2. Recommended Operating Conditions 2-3. DC Characteristics for Host I/O 2-4. BT/FM Host Interface 2-5. SDIO Timing 2-6. LPO Clock (RTC_CLK) 2-7. Power-On sequence 3. Pin Definition 3-1. Pin Description 3-2. Pin Description comparison with PCI-Express specification 4. Mechanical Information 5.
1. General Description 1-1. Product Overview and Functional Description AzureWave Technologies, Inc. introduces the first IEEE 802.11a/b/g/n WLAN, Bluetooth and FM combo module - AW-NH930. The module is targeted to mobile devices including, Digital Still Cameras (DSCs), Portable Media Players (PMPs), and Gaming Devices, mobile phones which need small footprint package, low power consumption, multiple OS support.
1-2. Key Features General Integrates Broadcom solutions of BCM4329 WiFi/BT/FM SoC SDIO interfaces support for WLAN ECI—enhanced coexistence support, ability to coordinate BT SCO transmissions around WLAN receives High speed UART and PCM for Bluetooth FM subsystem control through Bluetooth HCI interface Flexible Power Supply(2.3V~5.5V) Multiple power saving modes for low power consumption Lead-free /Halogen Free Design WLAN Dual- band 2.4 GHz/5GHz 802.11 a/b/g/n Supports antenna diversity Supports IEEE 802.
FM 76-MHz to 108-MHz FM bands supported (US, Europe, and Japan) RDS and RBDS demodulator and decoder with filter and buffering functions Auto search and tuning modes FM line-level analog stereo output available Block Diagram A simplified block diagram of the AW-NH930 module is depicted in the figure below. VBAT 2.3~5.5V for internal PMU ANT 1 5 GHz WLAN Rx LNA 5 GHz WLAN Tx UART for BT/FM PCM for BT Analog Line-out/in for FM SW Diplexer SW ANT 2 BCM4329 2.4 GHz BT Tx 2.4 GHz WLAN Rx/BT Rx 2.
1-3. Specifications Table *Specifications are subject to change without notice Model Name AW-NH930 Product Description Wireless LAN &Bluetooth & FM WLAN Standard IEEE 802.11a/b/g/n, Wi-Fi compliant Bluetooth Standard Bluetooth 2.1+Enhanced Data Rate (EDR) / BT3.0+HS Host Interface Audio Interface SDIO for WLAN UART for Bluetooth and FM Digital PCM for Bluetooth. Analog line level i/o for FM. Dimension 26.6 mm X 29.8 mm x 3.
WLAN: 11b: 16 dBm (± 2dBm) 11g: 15 dBm (± 2dBm) Output Power 11n: 13 dBm (± 2dBm) 11a: 11 dBm (± 2dBm) Bluetooth: 6.5 dBm (Typ.) WLAN: 11b (11Mbps): -84 dBm 11g (54Mbps): -70 dBm 11n (HT20 MCS7): -66 dBm 11a (54Mbps): -70 dBm Receive Sensitivity 11a (HT20 MCS7): -68 dBm Bluetooth: GFSK: -83 dBm π/4-DQPSK: -86 dBm 8-DPSK: -81 dBm FM: 0 dBuV (Audio) WLAN 802.11b: 1, 2, 5.5, 11Mbps Data Rates 802.11g: 6, 9, 12, 18, 24, 36, 48, 54Mbps 802.11n:MCS 0~7 HT20 Bluetooth Bluetooth 2.
2. Electrical Characteristics 2-1. Absolute Maximum Ratings Symbol Parameter Min Max Units VDD_CORE Power supply for Core Voltage Voltage -0.5 1.32 V VDDIO_SD Host I/O power supply for WL -0.5 4.1 V VDDIO I/O power supply for BT/FM/GPIO -0.5 4.1 V VBAT_IN Power supply for Internal Regulators -0.5 6.5 V VDD_RADIO_PLL_IN Power supply for Noise Sensitive Block (AFE,PLL…) -0.5 1.32 V 2-2.
2-3. DC Characteristics for Host I/O Symbol Parameter Condition VIL Input low voltage (VDDIO VDDIO_SD) 1.8V Logic VIH Input high voltage (VDDIO VDDIO_SD) 1.8V Logic VOL(~100uA Load) Output low voltage (VDDIO VDDIO_SD) 1.8V Logic VOH(~100uA Load) Output high voltage (VDDIO 1.8V Logic VIL V ) Input low voltage (VDDIO VDDIO_SD) 3.3V Logic VIH Input high voltage (VDDIO VDDIO_SD) 3.3V Logic VOL(~100uA Load) Output low voltage (VDDIO VDDIO_SD) 3.
2-4-1.1. UART Interface Signals Pin No Pin Name 10 BT_UART_TXD 12 BT_UART_RXD 14 BT_UART_RTS_N 8 BT_UART_CTS_N Description Type Bluetooth UART Serial Output O Serial data output for the HCI UART Interface Bluetooth UART Series Input I Serial data input for the HCI UART Interface Bluetooth UART Request to Send. O Active-low request to send signal for the HCI UART interface Bluetooth UART Clear to Send I Active-low clear to send signal for the HCI UART interface. 2-4-1.2.
2-4-2. PCM Interface The PCM Interface on the AW-NH930 can connect to linear PCM Codec devices in master or slave mode. In master mode, the AW-NH930 generates the BT_PCM_CLK and BT_PCM_SYNC signals, and in slave mode, these signals are provided by another master on the PCM interface and are inputs to the AW-NH930. The AW-NH930 supports up to three SCO or eSCO channels through the PCM Interface and each channel can be independently mapped to any of the available slots in a frame.
Values are specified in the recommended operating conditions unless otherwise specified.
Values are specified in the recommended operating conditions unless otherwise specified.
Values are specified in the recommended operating conditions unless otherwise specified.
Values are specified in the recommended operating conditions unless otherwise specified. Symbol Description Min Typ Max Units 2048 kHz 1 PCM bit clock frequency 128 2 PCM bit clock high time 209 ns 3 PCM bit clock low time 209 ns 50 ns 10 ns 4 Setup time for BT_PCM_SYNC before falling edge of BT_PCM_CLK during first bit time Hold time for BT_PCM_SYNC after falling edge of BT_PCM_CLK during 5 second bit period.
SDIO Bus Timing(1) (Default Mode) - 17 -
SDIO Bus Timing (High-Speed Mode) - 18 -
2-6. LPO Clock (RTC_CLK) 2-7. Power-On Sequence The AW-NH931 has four signals that allow the host to control power consumption by enabling or disabling the Bluetooth, WLAN and internal regulator blocks. These signals are described below. Additionally, diagrams are provided to indicate proper sequencing of the signals for carious operating states. The timing value indicated are minimum required values: longer delays are also acceptable. Note: The WL_SHUTDOWN_N and BT_SHUTDOWN_N are ORed in the AW-NH931.
WL_RST_N: Low asserting Reset for WLAN Core. This pin must be driven high or low ( not left floating ). BT_RST_N: Low asserting Reset for Bluetooth Core. This pin must be driven high or low (not left floating). 2-7.1 Power on sequence for WLAN=ON and Bluetooth=ON 2-7.
2-7.3 Power on sequence for WLAN=ON and Bluetooth=OFF 2-7.
3. Pin Definition 3-1. Pin Description Pin No Pin Name Description Type Host wake up. Signal from the AW-NH930 to the host indicating that the 1 WL_HOST_WAKE WLAN device requires attention. ‧ Asserted: Host device must wake-up or remain awake. O ‧ Deasserted: Host device may sleep when sleep criteria are met. The polarity of this signal is software configurable and can be asserted high or low.
Pin No Pin Name Description 20 BT_RST_N Low Asserting Reset for Bluetooth Core. 21 GND Ground 22 WL_RST_N Low asserting reset for WLAN. 23 NC No Connect 24 VBAT3V3_IN Power supply for Internal regulators 25 NC No Connect 26 GND Ground 27 GND Ground 28 VDDIO Digital I/O power supply for WL/BT/FM (1.8V~3.
Pin No 44 Pin Name WL_GPIO_1 45 SDIO_CMD_SPI_DI 46 BT_GPIO_2 Description Type Reserved pin. WLAN general purpose interface pins. The pin is high-impedance on power up and reset. Subsequently, they become inputs or outputs through software control. The pin has programmable pull-up/down. SDIO 4-bit Mode: Command line SDIO 1-bit Mode: Command line This pin has an internal weak pull-up resistor. The resistor is enabled by default but can be disabled by software.
3-2. Pin Description comparison with PCI-Express specification ※ All of pin definition for module side PCI-Express Definition AW-NH930 Definition PCI-Express Definition AW-NH930 Definition Pin No Name Name Pin No Name Name 1 WAKE# WL_HOST_WAKE 2 3.3Vaux VBAT3V3_IN 3 Reserved BT_PCM_IN 4 GND GND 5 Reserved BT_PCM_OUT 6 1.
Federal Communication Commission Interference Statement This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
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