Data Sheet

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12
11.
The other layout guide Information
• Make sure every power traces have good return path (ground path).
• Connect the input pins of unused internal regulators to ground.
• Leave the output pins of unused internal regulators floating.
High speed interface (i.e. UART/SDIO/HSIC) shall have equal electrical length. Keep them away from
noise sensitive blocks.
• Good power integrity of VDDIO will improve the signal integrity of digital interfaces.
Good return path and well shielded signal can reduce crosstalk, EMI emission and improve signal
integrity.
RF IO is around 50 ohms, reserve Pi or T matching network to have better signal transition from port to
port.
Smooth RF trace help to reduce insertion loss. Do not use 90 degrees turn (use two 45 degrees turns or
one miter bend instead).
Well arranged ground plane near antenna and antenna itself will help to reduce near field coupling
between other RF sources (e.g. GSM/CDMA … antennas).
Discuss with AzureWave Engineer after you finish schematic and layout job.