Data Sheet
Table Of Contents
15
3.4.2 SDIO Protocol Timing
3.4.2.1 Default Speed, High-Speed Modes (3.3V)
SDIO protocol timing Diagram - Default mode. (3.3V)
SDIO protocol timing Diagram - High Speed mode. (3.3V)
Symbol Parameter Condition Min Typ Max Units
fpp CLK Frequency
Normal
0
-- 25 MHz
High Speed
0
-- 50 MHz
T
WH
CLK High Time
Normal 10 -- -- ns
High Speed
7
-- -- ns
T
WL
CLK Low Time
Normal 10 -- -- ns
High Speed
7
-- -- ns
T
ISU
Input Setup Time
Normal
5
-- -- ns
High Speed
6
-- -- ns
T
IH
Input Hold Time
Normal
5
-- -- ns
High Speed
2
-- -- ns
T
ODLY
Output Delay Time Normal -- -- 14 ns
CL ≦ 40pF (1 card)
High Speed -- -- 14 ns
T
OH
Output Hold Time High Speed 2.5 -- -- ns
SDIO Timing Data – Default Speed / High-Speed modes. (3.3V)