User manual

92 Rockwell Automation Publication MOTION-UM003F-EN-P - March 2015
Chapter 4 Configure a Project for Integrated Motion on the EtherNet/IP Network
Set Time Synchronization
This technology supports highly distributed applications that require time
stamping, sequence of events recording, distributed motion control, and
increased control coordination. All controllers and communication modules
must have time synchronization that is enabled for applications that use
Integrated Motion on the EtherNet/IP network.
Time synchronization in the Logix system is called CIP Sync. CIP Sync provides
a mechanism to synchronize clocks between controllers, I/O, and other devices
that are connected over CIP networks and the ControlLogix or CompactLogix
backplane. The device with the best clock becomes the Grandmaster time source
for your system.
Figure 4 - Star Topology with the ControlLogix Controller as the Grandmaster
EtherNet/IP™
Logix5563
EtherNet/IP™
EtherNet/IP™
SOE INTPUTSOE INTPUT SOE INTPUT SOE INTPUT SOE INTPUT SOE INTPUT
EtherNet/IP™
SOE INTPUTSOE INTPUT SOE INTPUT SOE INTPUT SOE INTPUT SOE INTPUT
Logix5563
EtherNet/IP™
SOE INTPUT SOE INTPUT SOE INTPUT SOE INTPUT
S
P2=1
P2=2
Stratix 8000
GM
CIP Sync
CIP Sync
CIP Sync
L
7
X
S
O
E
S
O
E
S
O
E
S
O
E
E
N
2
T
S
O
E
S
O
E
S
O
E
S
O
E
S
O
E
S
O
E
E
N
2
T
E
N
2
T
S
O
E
S
O
E
S
O
E
S
O
E
S
O
E
S
O
E
E
N
2
T
E
N
2
T
D
I
O
D
I
O
D
I
O
D
I
O
D
I
O
L
7
X
EtherNet/IP
CIP Sync
S
M
S
S S S
CIP Sync
S
M
S
S
S
S
S
CIP Sync
S
M
S
S
S
S
S
CIP Sync
M
S
CIP Sync
Stratix 8000
Supervisory
M
NTP
HMI
DANGER
65006500
6500
6500
6500
CIP Sync
S
Kinetix 6500
POINT I/O
S
PowerFlex 755
TM
S
S
S
M
350
MEM
A=ENABLE
B= REGEN
C=DATA ENTRY
D=FAULT
E=COM ACTIVITY
24VDC
INPUT
BRAKE/
DC BUS
A
B
D
E
C
ETHERNET
MORTOR FEEDBACK
S
Kinetix 350
350
MEM
A=ENABLE
B= REGEN
C=DATA ENTRY
D=FAULT
E=COM ACTIVITY
24VDC
INPUT
BRAKE/
DC BUS
A
B
D
E
C
ETHERNET
MORTOR FEEDBACK
Kinetix 350
S
CIP Sync
Kinetix 5500
S
TM
GM = Grandmaster (time source)
M = Master
S = Slave
P1 and P2 = Priorities Priorities are automatically assigned based on their clock quality, which is determined by the Best Clock Algorithm. In this example, P2=1 is
the best quality so it becomes the Grandmaster. If the P2=1 device loses clock quality for some reason, then P2=2 would become the
Grandmaster for the system.