User guide

Spartan-6 FPGA Configuration User Guide www.xilinx.com 97
UG380 (v2.7) October 29, 2014
Configuration Packets
The Type 2 word count follows the Type 2 packet header and contains two 16-bit words,
with MSB in the first word.
Following the Type 2 word count section is the Type 2 data section; it contains the number
of 16-bit words that the word count portion of the header specifies.
Word Count = (Total Number of Frames + 1 Dummy Frame) x Actual Frame Length
Configuration Registers
Table 5-30 summarizes the configuration registers. A detailed explanation of selected
registers follows.
Table 5-26: Type 2 Packet Header
Header Type Operation
Register
Address
(Not Used)
Bits [15:13] [12:11] [10:5] [4:0]
Type 2 010 xx xxxxxx 00000
Table 5-27: Type 2 Packet Word Count Data 2
WC1 [31:16]
Data 0000xxxxxxxxxxxx
Table 5-28: Type 2 Packet Word Count Data 1
WC2 [15:0]
Data xxxxxxxxxxxxxxxx
Table 5-29: Type 2 Packet Data Section
Data [15:0]
Word [1] xxxxxxxxxxxxxxxx
… xxxxxxxxxxxxxxxx
Word [wc] xxxxxxxxxxxxxxxx
Table 5-30: Configuration Registers
Register Name R/W Address Description
CRC W 6'h00 Cyclic Redundancy Check.
FAR_MAJ W 6'h01 Frame Address Register Block and Major.
FAR_MIN W 6'h02 Frame Address Register Minor.
FDRI W 6'h03 Frame Data Input.
FDRO R 6'h04 Frame Data Output.
CMD R/W 6'h05 Command.
CTL R/W 6'h06 Control.
MASK R/W 6'h07 Control Mask.
STAT R 6'h08 Status.