User guide

92 www.xilinx.com Spartan-6 FPGA Configuration User Guide
UG380 (v2.7) October 29, 2014
Chapter 5: Configuration Details
eFUSE Registers
A Spartan-6 FPGA has a total of three eFUSE registers. Table 5-18 lists the eFUSE registers
in Spartan-6 devices with their sizes and usage. The eFUSE bits are addressed so that the
LSB is shifted in/out first and MSB is last.
eFUSE Control Register (FUSE_CNTL)
This register contains six user programmable bits. These bits are used to select AES key
usage and set the read/write protection for eFUSE registers, as detailed in Table 5-19. Bit 0
is shifted in or out first.
The eFUSE bits are one-time programmable (OTP). Once programmed, they cannot be
unprogrammed. For example, if access to a register is disabled, it cannot be re-enabled.
Table 5-18: eFUSE Registers
Register Name
Size
(Bits)
Contents Description
FUSE_KEY
(1)
256 Bitstream encryption key
[0:255]
(bit 255 shifted first)
Stores key for use by AES bitstream decryptor. The eFUSE key
can be used instead of the key stored in battery-backed SRAM.
The AES key is used by the Spartan-6 FPGA decryption engine
to load encrypted bitstreams. Depending on the read/write
access bits in the CNTL register, the AES key can be
programmed and read through the JTAG port.
FUSE_ID 57 Device DNA
[0:56]
(bit 56 shifted first)
Stores device DNA, a read-only register that is accessed
through the JTAG port or the DNA_PORT primitive.
FUSE_CNTL
(1)
32 Control Bits
CNTL [31:0]
(bit 0 shifted first)
Controls key use and read/write access to eFUSE registers.
This register can be programmed and read through the JTAG
port.
Notes:
1. FUSE_KEY and FUSE_CNTL are only available on 6SLX75/T, 6SLX100/T, and 6SLX150/T devices.
Table 5-19: eFUSE CNTL Register Bits
Bit # Name Description Comments
0:7 - - Reserved
8 CNTL Security Disable read and write of
the CNTL registers.
Redundant with
CNTL[12].
The user must program this bit after
programming and verifying AES and
CNTL registers to prevent any
manipulation or readback of these
registers.
9-- Reserved
10 Key Security Disables read and write of
KEY register. Redundant
with CNTL[14].
The user must program this bit after
programming and verifying AES
registers to prevent manipulation or
readback of these registers.
11 - - Reserved