User guide

86 www.xilinx.com Spartan-6 FPGA Configuration User Guide
UG380 (v2.7) October 29, 2014
Chapter 5: Configuration Details
Load Configuration Data Frames (Step 6)
After the synchronization word is loaded and the device ID has been checked, the
configuration data frames are loaded. This process is transparent to most users.
Cyclic Redundancy Check (Step 7)
As the configuration data frames are loaded and after synchronization, the device
calculates a Cyclic Redundancy Check (CRC) value from the configuration data packets.
After the configuration data frames are loaded and before the DESYNC word, the
configuration bitstream can issue a Check CRC instruction to the device, followed by an
expected CRC value. If the CRC value calculated by the device does not match the
expected CRC value in the bitstream, the device pulls INIT_B Low and aborts
configuration. The CRC check is included in the configuration bitstream by default,
although the designer can disable it if desired. (Refer to the BitGen section of UG628
,
Command Line Tools User Guide.) If the CRC check is disabled, there is a risk of loading
incorrect configuration data frames, causing incorrect design behavior or damage to the
device.
If a CRC error occurs during configuration from a mode where the FPGA is the
configuration master, the device can attempt to do a fallback reconfiguration (see Fallback
MultiBoot, page 132).
Startup (Step 8)
X-Ref Target - Figure 5-9
Figure 5-9: Load Configuration Data Frames (Step 6)
Device
Power-Up
Sample Mode
Pins
Synchronization
Device ID
Check
CRC Check
Clear
Configuration
Memory
Startup
Sequence
Load
Configuration
Data
Start
Finish
UG380_c5_09_042909
Bitstream
Loading
Steps
123 45678
X-Ref Target - Figure 5-10
Figure 5-10: Cyclic Redundancy Check (Step 7)
Device
Power-Up
Sample Mode
Pins
Synchronization
Device ID
Check
CRC Check
Clear
Configuration
Memory
Startup
Sequence
Load
Configuration
Data
Start
Finish
UG380_c5_10_042909
Bitstream
Loading
Steps
123 45678
X-Ref Target - Figure 5-11
Figure 5-11: Startup Sequence (Step 8)
Device
Power-Up
Sample Mode
Pins
Synchronization
Device ID
Check
CRC Check
Clear
Configuration
Memory
Startup
Sequence
Load
Configuration
Data
Start
Finish
UG380_c5_11_042909
Bitstream
Loading
Steps
123 45678