User guide

Spartan-6 FPGA Configuration User Guide www.xilinx.com 65
UG380 (v2.7) October 29, 2014
Chapter 4
User Primitives
The configuration primitives described in this chapter are provided for users to access
FPGA configuration resources during or after FPGA configuration. For additional
information and instantiation templates, refer to UG6
15, Spartan-6 Libraries Guide for HDL
Designs.
BSCAN_SPARTAN6
JTAG is a standard four-pin interface: TCK, TMS, TDI, and TDO. Many applications are
built around this interface. The JTAG TAP controller is a dedicated state machine inside the
configuration logic. BSCAN_SPARTAN6 provides access between the JTAG TAP controller
and user logic in fabric. There are up to four instances of BSCAN_SPARTAN6 for each
device. Each instance of this design element can handle one JTAG USER instruction
(USER1 through USER4) as set with the JTAG_CHAIN attribute. To handle all four USER
instructions, four of these elements can be instantiated, and the JTAG_CHAIN attribute
must be set appropriately. Table 4-1 lists the BSCAN_SPARTAN6 port descriptions.
Table 4-1: BSCAN_SPARTAN6 Port Descriptions
Signal Name Type Function
SEL Output Active-High interface selection output. SEL = 1 when the JTAG
instruction register holds the corresponding (USER1, USER2,
USER3, or USER4) instruction. Change in Update_IR state. SEL
changes on the falling edge of TCK in the UPDATE_IR state of
the TAP controller.
RESET Output Active-High reset output. RESET = 1 during the
TEST-LOGIC-RESET state, PROGRAM_B, or during
power-up. This signal is deasserted on the falling edge of TCK.
TDI Output Fed through directly from the FPGA TDI pin.
DRCK Output DRCK is the same as TCK in the Capture_DR and Shift_DR
states. If the interface is not selected by the instruction register,
DRCK remains High.
CAPTURE Output Active-High pulse indicating the Capture_DR state. This signal
is asserted on the falling edge of TCK.
UPDATE Output Active-High pulse indicating the Update_DR state. This signal
is asserted on the falling edge of TCK.
SHIFT Output Active-High pulse indicating the Shift_DR state. This signal is
asserted on the falling edge of TCK.
RUNTEST Output Indicates JTAG is in Run Test/Idle state.