User guide

Spartan-6 FPGA Configuration User Guide www.xilinx.com 31
UG380 (v2.7) October 29, 2014
SelectMAP Configuration Interface
Table 2-3 describes the SelectMAP configuration interface.
Single Device SelectMAP Configuration
This section describes how to configure a single device in SelectMAP mode, where the
FPGA connects either to a Platform Flash PROM or to a microprocessor or CPLD.
Table 2-3: Spartan-6 FPGA SelectMAP Configuration Interface Pins
Pin Name Type
Dedicated
or Dual-
Purpose
Description
M[1:0] Input Dual-
Purpose
Mode pins - determine configuration mode.
See Table 2-1, page 23.
CCLK Input and
Output
Dual-
Purpose
Configuration clock source for all configuration
modes except JTAG. See Board Layout for
Configuration Clock (CCLK), page 54.
D[15:0] 3-State
Bidirectional
Dual-
Purpose
Configuration and readback data bus, clocked on
the rising edge of CCLK. See Parallel Bus Bit Order,
page 79.
DONE Bidirectional,
Open-Drain
or
Active
Dedicated
Active-High signal indicating configuration is
complete:
0 = FPGA not configured
1 = FPGA configured
INIT_B Input or
Output,
Open-Drain
Dual-
Purpose
Before the Mode pins are sampled, INIT_B is an
input that can be held Low to delay configuration.
After the Mode pins are sampled, INIT_B is an
open-drain, active-Low output indicating whether
a CRC error occurred during configuration:
0 = CRC error
1 = No CRC error
When the SEU detection function is enabled,
INIT_B is reserved and cannot be used as user I/O.
PROGRAM_B Input Dedicated
Active-Low asynchronous full-chip reset.
CSI_B Input Dual-
Purpose
Active-Low chip select to enable the SelectMAP
data bus (see SelectMAP Data Loading, page 35):
0 = SelectMAP data bus enabled
1 = SelectMAP data bus disabled
RDWR_B Input Dual-
Purpose
Determines the direction of the D[x:0] data bus (see
SelectMAP Data Loading, page 35):
0 = inputs
1 = outputs
RDWR_B input can only be changed while CSI_B is
deasserted, otherwise an ABORT occurs (see
SelectMAP ABORT, page 153). RDWR_B can be
used as a V
REF
pin, but doing so prevents use of the
SelectMAP configuration mode.
CSO_B Output Dual-
Purpose
Parallel daisy-chain active-Low chip select output.
Not used in single FPGA applications.
BUSY Output Dual-
Purpose
This output pin is used during readback. This pin
can toggle during configuration.