User guide

166 www.xilinx.com Spartan-6 FPGA Configuration User Guide
UG380 (v2.7) October 29, 2014
Chapter 10: Advanced JTAG Configurations
X-Ref Target - Figure 10-5
Figure 10-5: Device Configuration Flow Diagram
Sample
Mode Pins
JTAG Available
Keep Clearing
Configuration
Memory
No
No
Ye s
Ye s
Ye s
Ye s
No
Ye s
Clear Configuration
Memory Once More
Power-Up
V
CCINT
> .75V
CRC
Correct?
Load CFG_IN
Instruction
Load
Bitstream
Abort Startup
Shutdown
Sequence
Reconfigure?
Load JSTA RT
Instruction
Startup
Sequence
Operational
INIT_B = High?
PROGRAM_B
Low?
UG380_c10_05_042909
Load
JSHUTDOWN
Instruction
No