User guide

152 www.xilinx.com Spartan-6 FPGA Configuration User Guide
UG380 (v2.7) October 29, 2014
Chapter 9: Advanced Configuration Interfaces
Ganged SelectMAP
It is also possible to configure simultaneously multiple devices with the same
configuration bitstream by using a ganged SelectMAP configuration. In a ganged
SelectMAP arrangement, the CSI_B pins of two or more devices are connected together (or
tied to ground), causing all devices to recognize data presented on the D pins.
All devices can be set for Slave SelectMAP mode if an external oscillator is available, or one
device can be designated as the Master device, as illustrated in Figure 9-5.
Notes relevant to Figure 9-5:
1. The DONE pin is by default an open-drain output requiring an external pull-up
resistor. In this arrangement, the active DONE driver must be disabled for both
devices.
2. The INIT_B pin is a bidirectional, open-drain pin. An external pull-up resistor is
required.
3. The BitGen startup clock setting must be set for CCLK for SelectMAP configuration.
4. The BUSY signal is not used for ganged SelectMAP configuration.
5. The PROM in this diagram represents one or more Xilinx PROMs. Multiple Xilinx
PROMs can be cascaded to increase the overall configurations storage capacity.
6. The BIT file must be reformatted into a PROM file before it can be stored on the Xilinx
PROM. Refer to the Generating PROM Files, page 77.
X-Ref Target - Figure 9-5
Figure 9-5: Ganged x8 SelectMAP Configuration
D[0:7]
CCLK
D[0:7]
CCLK
PROGRAM_B
D[0:7]
CCLK
PROGRAM_B
DONE
DONE
BUSY
BUSY
INIT_B
INIT_B
CE
RESET/OE
UG380_c9_05_011513
Xilinx
Platform Flash
PROM
Spartan-6 FPGA
SelectMAP
Master
Spartan-6 FPGA
SelectMAP
Slave
M1 M0
4.7 kΩ
330Ω
M1 M0
PROGRAM_B