User guide

Spartan-6 FPGA Configuration User Guide www.xilinx.com 115
UG380 (v2.7) October 29, 2014
Chapter 6
Readback and Configuration
Verification
Spartan®-6 devices allow users to read configuration memory through the SelectMAP,
ICAP, and JTAG interfaces. During readback, the user reads all configuration memory
cells, including the current values on all user memory elements (LUT RAM, SRL16, and
block RAM).
To read configuration memory, users must send a sequence of commands to the device to
initiate the readback procedure. Once initiated, the device dumps the contents of its
configuration memory to the SelectMAP or JTAG interface. The Accessing Configuration
Registers through the SelectMAP Interface section and IEEE Std 1149.1 JTAG describe the
steps for reading configuration memory.
Users can send the readback command sequence from a custom microprocessor, CPLD, or
FPGA-based system, or use iMPACT to perform JTAG-based readback verify. iMPACT, the
device programming software provided with the ISE® software by Xilinx, can perform all
readback and comparison functions for Spartan-6 devices and report to the user whether
there were any configuration errors.
Once configuration memory is read from the device, the next step is to determine if there
are any errors by comparing the readback bitstream to the configuration bitstream. The
Veri fy ing R ead back Data section explains how this is done.
Preparing a Design for Readback
There are two mandatory bitstream settings for readback using JTAG or SelectMAP: the
BitGen security setting must not prohibit readback (-g Security:none), and bitstream
encryption must not be used. Additionally, if readback is to be performed through the
SelectMAP interface, the port must be set to retain its function after configuration by
setting the persist option in BitGen (-g Persist:Yes), otherwise the SelectMAP data pins
revert to user I/O, precluding further configuration operations. Beyond these security and
encryption requirements, no special considerations are necessary to enable readback
through the boundary-scan port. Also, these requirements are not necessary when using
readback via the ICAP. Limitations for readback are:
• Performing a readback while the design is in operation (without providing a
shutdown command) results in reading back invalid block RAM data. The actual
contents of the block RAM are unaffected.
• Performing a readback (with or without a shutdown command) corrupts the contents
of block RAMs configured in 9K mode.