User guide

112 www.xilinx.com Spartan-6 FPGA Configuration User Guide
UG380 (v2.7) October 29, 2014
Chapter 5: Configuration Details
It is also possible to add additional bits to the identifier using FPGA logic resources. As
shown in Figure 5-17, the FPGA application can insert additional bits via the DNA_PORT
DIN serial input. The additional bits provided by the logic resources could take the form of
an additional fixed value or a variable computed from the device DNA.
JTAG Access to Device Identifier
The FPGA's internal device identifier, plus any values shifted in on the DIN input, can be
read via the JTAG port using the private ISC_DNA command. This requires the
ISC_ENABLE to be loaded before the ISC_DNA command is issued.
Bit 56 of the identifier, shown in Figure 5-14, appears on the TDO JTAG output following
the ISC_DNA command when the device enters the Shift-DR state. The remaining Device
DNA bits and any data on the input to the register are shifted out sequentially while the
JTAG controller is left in the Shift-DR state. When this operation is complete, the
ISC_DISABLE command should be issued.
iMPACT Access to Device Identifier
The iMPACT software in ISE 10.1 (and later) tools can also read the device DNA value.
readDna -p <position> is the batch command that reads the device DNA from the
FPGA.
Bitstream Compression
By default, FPGA bitstreams are uncompressed. However, Spartan-6 FPGAs support basic
bitstream compression. The compression is fairly simple, yet effective for some
applications. The ISE bitstream generator software examines the FPGA bitstream for any
duplicate configuration data frames. These duplicates occur often in these situations:
• FPGA designs with unused block RAM or hardware multipliers.
• FPGA designs with low logic utilization, such as when most of the FPGA array is
empty.
The ISE software can then generate a compressed FPGA bitstream. As the FPGA
configures, the internal configuration controller copies the redundant data frame to
multiple locations. Compression is not supported for encrypted bitstreams.
The amount of compression is non-deterministic. Changes to the source FPGA design can
cause the size of the compressed bitstream to grow. Sparse, mostly empty FPGA designs
X-Ref Target - Figure 5-17
Figure 5-17: Bitstream Specific Code
UG380_c5_17_052009
DIN DOUT
DNA_PORT
READ
S HIFT
CLK
Application Code
DIN DOUT
READ
S HIFT
CLK
READ
S HIFT
CLK