User guide

Spartan-6 FPGA Configuration User Guide www.xilinx.com 101
UG380 (v2.7) October 29, 2014
Configuration Packets
Control Register 0 (CTL)
The CTL register is used to configure the Spartan-6 device. Writes to the CTL register are
masked by the value in the MASK register. The name of each bit position in the CTL0
register is given in Table 5-34.
SHUTDOWN 01011 Begins the shutdown sequence: Initiates the shutdown sequence,
disabling the device when finished. Shutdown activates on the next
successful CRC check or RCRC instruction (typically, an RCRC
instruction).
DESYNC 01101 Resets the DALIGN Signal: Used at the end of configuration to
desynchronize the device. After desynchronization, all values on
the configuration data pins are ignored.
IPROG 01110 Generates reboot_rst to reconfigure from the address specified in
the general register.
Table 5-33: Command Register Codes (Cont’d)
Command Code Description
Table 5-34: Control Register 0 (CTL0) Description
Name Bit Index Description BitGen Default
DEC 6 Decryption
0: No decryption
1: Decryption used (automatically set SBITS to Level1 or up
and mc_enc=1)
Once set to 1, the DEC cannot be altered except by hard
reboot (PROGRAM_B or JPROGRAM).
0
SBITS 5:4 Security level:
Level0: SBITS=00: R/W OK (default)
Level1: SBITS=01: Permits only ICAP readback
Level2: SBITS=10: All readback disabled;
(en_vrb_b =1 => Vrd=0)
Level3: SBITS=11: Readback disabled, Writing disabled
except CRC,CMD; (mc_vrd=1 => Vrd=0)
Once set to 1, the SBITS cannot be altered except by soft
reboot (PROGRAM_B, JPROGRAM, IPROG command,
error reboot, or fallback reboot).
00
PERSIST 3 Configuration interface remains after configuration
0: No (default)
1: Yes
0
USE_EFUSE_KEY 2 Use eFUSE key as decryption key
0: Use battery-backed RAM key (default)
1: Use eFUSE key
0