2011

of a 3-phase bus there are three marker blocks with a common CODE value and a
common ORDER value. The ORDER value can be an integer or a decimal number
value. Support for decimal number order values makes it easy to add a marker block
between two others without having to reorder everything.
This attribute value contains miscellaneous annotation values, actions, and flags.
Annotation values are in the format <attribute name>=<attribute value>. Actions can
MISC1
include embedded AutoLISP expressions or programs. Flags are key words that include
enabling child contacts to link to parents and overriding multi-pole build directions.
Flag codes include the following
■ _TAGFMT=<value> - override the drawing property component tag format or
wire number format setting for this one instance.
■ _PRETAG=<value> - predefine a default alias tag for parent child linking. This
option can be used for situations when the child component is inserted before
the parent. For example, the marker block for the child contact has
"_PRETAG=MR". When the parent coil is inserted, its marker block also has
"_PRETAG=MR". As the circuit completes, the actual tag value of the parent an-
notates on to the child contact. This action is based upon the matching "MR"
alias assigned to each.
■ _WIRENO=<value> - predefine a fixed wire number.
■ WIRENUMBERS=0 - if a required wire type does not exist, create it and mark it
as No Wire Numbering. If a required wire type does not exist and this flag is
missing or has a value of 1, create it and mark it as Wire Numbering.
■ _WIRETYPE=<value> - predefine the wire type layer name.
■ _WIRESKIP=<value> - number of wires to skip over when trying to connect to
another wire.
■ _MAXTRAPCOUNT=<value> - maximum search distance to look for a wire
connection, given in wire connection trap units. The wire connection trap value
is fixed and is displayed on the
Drawing properties: drawing format tab on page
231 for the active drawing.
■ _BASE - indicates a base wire, the one that does not move, when setting up to
adjust multiple bus wire spacing. If not defined, the wire that is co-linear with
the insertion point of the template becomes the default base wire.
■ _L =<value>- each sublist, delimited by "|" characters, can predefine attribute
values for individual poles of a multi-pole component, set of terminals, or set of
cable markers.
■ _D=<value> - define the build direction override for a multi-pole component.
1=build right, 2=build up, 4=build left, 8=build down. Without an override, the
build direction is down for horizontal inserts, and from left to right for vertical
inserts.
Drawing templates | 661