Specifications

Table Of Contents

Code for Third-Party Readers

Using the SkyePlus Multiplexer with Other Devices 35

Mux.h

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/************************************************************

* !!!EXAMPLE NAMES ONLY!!!

* Processor specific settings

* Replace with the names of your IO port and data direction registers.

* Replace with appropriate bit masks.

************************************************************/

//IO port registers

#define MUX_A0_IO (PORTA)

#define MUX_A1_IO (PORTA)

#define MUX_A2_IO (PORTA)

//IO Direction registers

#define MUX_A0_DIR (DDRA)

#define MUX_A1_DIR (DDRA)

#define MUX_A2_DIR (DDRA)

//Bit Mask needed to set data direction register as an output

#define MUX_A0_DIR_MASK (0xFE) //(MSB) 1111 1110 (LSB)

#define MUX_A1_DIR_MASK (0xFD) //(MSB) 1111 1101 (LSB)

#define MUX_A2_DIR_MASK (0xFB) //(MSB) 1111 1011 (LSB)

//Bit Mask needed for reading and for writing a high to the IO ports

#define MUX_A0_IO_MASK (0x01) //(MSB) 0000 0001 (LSB)

#define MUX_A1_IO_MASK (0x02) //(MSB) 0000 0010 (LSB)

#define MUX_A2_IO_MASK (0x04) //(MSB) 0000 0100 (LSB)