Datasheet

n-1 n-2 n-3 n-1 n-2 n-3
n-1 n-2 n-3 n-1 n-2 n-3
BCLK
WCLK
SDIN/
SDOUT
1 00 1 0
1/fs
LSBMSB
LeftChannel RightChannel
2 2
n−1
n−3
n−2
n−1
n−3
n−2
TLV320AIC3107
www.ti.com SLOS545D –NOVEMBER 2008–REVISED DECEMBER 2014
Feature Description (continued)
Figure 14. Right Justified Serial Bus Mode Operation
10.3.2.2 Left Justified Mode
In left-justified mode, the MSB of the right channel is valid on the rising edge of the bit clock following the falling
edge of the word clock. Similarly the MSB of the left channel is valid on the rising edge of the bit clock following
the rising edge of the word clock.
Figure 15. Left Justified Serial Data Bus Mode Operation
10.3.2.3 I
2
S Mode
In I
2
S mode, the MSB of the left channel is valid on the second rising edge of the bit clock after the falling edge
of the word clock. Similarly the MSB of the right channel is valid on the second rising edge of the bit clock after
the rising edge of the word clock.
Figure 16. I
2
S Serial Data Bus Mode Operation
Copyright © 2008–2014, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Links: TLV320AIC3107