Specifications

DTT 7685x
SBU Technology – Tuners ATSC half NIM with Ch 3 / 4 modulator
20 Apr 2007
Preliminary Specification Page 15 / 29
ADC input select (CD7)
ADS Status
0 AGC detector output
1 Disabled
ADC Output
Input Level (V) V2 V1 V0
Less 0.28Vcc 0 0 0
0.34Vcc to 0.44Vcc 0 0 1
0.5Vcc to 0.6Vcc 0 1 0
0.66Vcc to 0.76Vcc 0 1 1
More 0.8Vcc 1 0 0
Read Status Byte (SB2)
Bit Description
POR (Bit0)
The power-on reset indicator.
This is set to logic “1” if the Vcc supply to the device has
dropped below 3V (at 25°C).
FL (Bit1)
The PLL lock flag.
It indicates whether the device is phase locked. A logic “1”
is present if the devide is locked.
AGF (Bit4)
The AGC detector flag.
Logic”0” means Vagc < 4V (gain reduction)
Logic”1” means Vagc > 4 V (max gain)