Datasheet

AT89S53
4-242
AC Characteristics
Under operating conditions, load capacitance for Port 0, ALE/PROG, and PSEN = 100 pF; load capacitance for all other
outputs = 80 pF.
External Program and Data Memory Characteristics
Symbol Parameter
12MHz Oscillator Variable Oscillator
UnitsMin Max Min Max
1/t
CLCL
Oscillator Frequency 0 24 MHz
t
LHLL
ALE Pulse Width 127 2t
CLCL
- 40 ns
t
AVLL
Address Valid to ALE Low 43 t
CLCL
- 13 ns
t
LLAX
Address Hold After ALE Low 48 t
CLCL
- 20 ns
t
LLIV
ALE Low to Valid Instruction In 233 4t
CLCL
- 65 ns
t
LLPL
ALE Low to PSEN Low 43 t
CLCL
- 13 ns
t
PLPH
PSEN Pulse Width 205 3t
CLCL
- 20 ns
t
PLIV
PSEN Low to Valid Instruction In 145 3t
CLCL
- 45 ns
t
PXIX
Input Instruction Hold After PSEN 00 ns
t
PXIZ
Input Instruction Float After PSEN 59 t
CLCL
- 10 ns
t
PXAV
PSEN to Address Valid 75 t
CLCL
- 8 ns
t
AVIV
Address to Valid Instruction In 312 5t
CLCL
- 55 ns
t
PLAZ
PSEN Low to Address Float 10 10 ns
t
RLRH
RD Pulse Width 400 6t
CLCL
- 100 ns
t
WLWH
WR Pulse Width 400 6t
CLCL
- 100 ns
t
RLDV
RD Low to Valid Data In 252 5t
CLCL
- 90 ns
t
RHDX
Data Hold After RD 00 ns
t
RHDZ
Data Float After RD 97 2t
CLCL
- 28 ns
t
LLDV
ALE Low to Valid Data In 517 8t
CLCL
- 150 ns
t
AVDV
Address to Valid Data In 585 9t
CLCL
- 165 ns
t
LLWL
ALE Low to RD or WR Low 200 300 3t
CLCL
- 50 3t
CLCL
+ 50 ns
t
AVWL
Address to RD or WR Low 203 4t
CLCL
- 75 ns
t
QVWX
Data Valid to WR Transition 23 t
CLCL
- 20 ns
t
QVWH
Data Valid to WR High 433 7t
CLCL
- 120 ns
t
WHQX
Data Hold After WR 33 t
CLCL
- 20 ns
t
RLAZ
RD Low to Address Float 0 0 ns
t
WHLH
RD or WR High to ALE High 43 123 t
CLCL
- 20 t
CLCL
+ 25 ns