Datasheet

xii
8331B–AVR–03/12
Atmel AVR XMEGA AU
33.13 Register Description ......................................................................................452
33.14 Register Summary .........................................................................................452
34 Peripheral Module Address Map ........................................................ 453
35 Instruction Set Summary .................................................................... 456
36 Appendix A: EBI Timing Diagrams ..................................................... 461
36.1 SRAM 3-Port ALE1 CS ..................................................................................461
36.2 SRAM 3-Port ALE12 CS ................................................................................463
36.3 SRAM 4-Port ALE2 CS ..................................................................................466
36.4 SRAM 4- Port NOALE CS .............................................................................468
36.5 LPC 2- Port ALE12 CS ..................................................................................469
36.6 LPC 3- Port ALE1 CS ....................................................................................471
36.7 LPC 2- Port ALE1 CS ....................................................................................472
36.8 SRAM 3- Port ALE1 no CS ............................................................................473
36.9 SRAM 4- Port NOALE no CS ........................................................................475
36.10 LPC 2- Port ALE12 no CS .............................................................................476
36.11 SDRAM init ....................................................................................................478
36.12 SDRAM 8-bit Write ........................................................................................479
36.13 SDRAM 8-bit read .........................................................................................483
36.14 SDRAM 4-bit write .........................................................................................487
36.15 SDRAM 4-bit read .........................................................................................491
36.16 SRAM refresh ................................................................................................494
37 Datasheet Revision History ................................................................ 498
37.1 8331B – 03/12 ...............................................................................................498
37.2 8331A – 07/11 ...............................................................................................499
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