Datasheet

376
8331B–AVR–03/12
Atmel AVR XMEGA AU
28.16.10 CHnRESH – Channel n Result Register High
The CHnRESL and CHnRESH register pair represents the 16-bit value, CHnRES. For details on
reading 16-bit registers, refer to ”Accessing 16-bit Registers” on page 13.
28.16.10.1 12-bit Mode, Left Adjusted
• Bit 7:0 – CHRES[11:4]: Channel Result High
These are the eight msbs of the 12-bit ADC result.
28.16.10.2 12-bit Mode, Right Adjusted
• Bit 7:4 – Reserved
These bits will in practice be the extension of the sign bit, CHRES11, when the ADC works in dif-
ferential mode, and set to zero when the ADC works in signed mode.
• Bit 3:0 – CHRES[11:8]: Channel Result High
These are the four msbs of the 12-bit ADC result.
28.16.10.3 8-bit Mode
• Bit 7:0 – Reserved
These bits will in practice be the extension of the sign bit, CHRES7, when the ADC works in
signed mode, and set to zero when the ADC works in single-ended mode.
28.16.11 CHnRESL – Channel n Result register Low
28.16.11.1 12-/8-bit Mode
• Bit 7:0 – CHRES[7:0]: Channel Result Low
These are the eight lsbs of the ADC result.
28.16.11.2 12-bit Mode, Left Adjusted
• Bit 7:4 – CHRES[3:0]: Channel Result Low
These are the four lsbs of the 12-bit ADC result.
Bit 76543210
12-bit, left CHRES[11:4]
12-bit, right – – – – CHRES[11:8]
8-bit – – – – – – – –
Read/WriteRRRRRRRR
Initial Value00000000
Bit 76543210
12-/8-bit, right CHRES[7:0]
12-bit, left CHRES[3:0] – – – –
Read/WriteRRRRRRRR
Initial Value00000000