Datasheet

143
8331B–AVR–03/12
Atmel AVR XMEGA AU
13. I/O Ports
13.1 Features
• General purpose input and output pins with individual configuration
• Output driver with configurable driver and pull settings:
– Totem-pole
– Wired-AND
–Wired-OR
– Bus-keeper
– Inverted I/O
• Input with synchronous and/or asynchronous sensing with interrupts and events
– Sense both edges
– Sense rising edges
– Sense falling edges
– Sense low level
• Optional pull-up and pull-down resistor on input and Wired-OR/AND configurations
• Optional slew rate control
• Asynchronous pin change sensing that can wake the device from all sleep modes
• Two port interrupts with pin masking per I/O port
• Efficient and safe access to port pins
– Hardware read-modify-write through dedicated toggle/clear/set registers
– Configuration of multiple pins in a single operation
– Mapping of port registers into bit-accessible I/O memory space
• Peripheral clocks output on port pin
• Real-time counter clock output to port pin
• Event channels can be output on port pin
• Remapping of digital peripheral pin functions
– Selectable USART, SPI, and timer/counter input/output pin locations
13.2 Overview
AVR XMEGA microcontrollers have flexible general purpose I/O ports. One port consists of up to
eight port pins: pin 0 to 7. Each port pin can be configured as input or output with configurable
driver and pull settings. They also implement synchronous and asynchronous input sensing with
interrupts and events for selectable pin change conditions. Asynchronous pin-change sensing
means that a pin change can wake the device from all sleep modes, included the modes where
no clocks are running.
All functions are individual and configurable per pin, but several pins can be configured in a sin-
gle operation. The pins have hardware read-modify-write (RMW) functionality for safe and
correct change of drive value and/or pull resistor configuration. The direction of one port pin can
be changed without unintentionally changing the direction of any other pin.
The port pin configuration also controls input and output selection of other device functions. It is
possible to have both the peripheral clock and the real-time clock output to a port pin, and avail-
able for external use. The same applies to events from the event system that can be used to
synchronize and control external functions. Other digital peripherals, such as USART, SPI, and
timer/counters, can be remapped to selectable pin locations in order to optimize pin-out versus
application needs.