Datasheet

25
2586N–AVR–04/11
ATtiny25/45/85
In the ATtiny15 compatibility mode the frequency of the internal RC oscillator is calibrated down
to 6.4 MHz and the multiplication factor of the PLL is set to 4x. See Figure 6-3. With these
adjustments the clocking system is ATtiny15-compatible and the resulting fast peripheral clock
has a frequency of 25.6 MHz (same as in ATtiny15).
Figure 6-3. PCK Clocking System in ATtiny15 Compatibility Mode.
Note that low speed mode is not implemented in ATtiny15 compatibility mode.
6.2 Clock Sources
The device has the following clock source options, selectable by Flash Fuse bits as shown
below. The clock from the selected source is input to the AVR clock generator, and routed to the
appropriate modules.
Note: 1. For all fuses “1” means unprogrammed while “0” means programmed.
2. The device is shipped with this option selected.
3. This will select ATtiny15 Compatibility Mode, where system clock is divided by four, resulting in
a 1.6 MHz clock frequency. For more inormation, see “Calibrated Internal Oscillator” on page
27.
The various choices for each clocking option is given in the following sections. When the CPU
wakes up from Power-down, the selected clock source is used to time the start-up, ensuring sta-
ble Oscillator operation before instruction execution starts. When the CPU starts from reset,
there is an additional delay allowing the power to reach a stable level before commencing nor-
1/2
1.6 MHz
6.4 MHz
OSCILLATOR
PLL
8x
PLLEOSCCAL
3.2 MHz
LOCK
DETECTOR
SYSTEM
CLOCK
PLOCK
PCK
25.6 MHz
1/4
Table 6-1. Device Clocking Options Select
Device Clocking Option CKSEL[3:0]
(1)
External Clock (see page 26) 0000
High Frequency PLL Clock (see page 26) 0001
Calibrated Internal Oscillator (see page 27) 0010
(2)
Calibrated Internal Oscillator (see page 27) 0011
(3)
Internal 128 kHz Oscillator (see page 29) 0100
Low-Frequency Crystal Oscillator (see page 29) 0110
Crystal Oscillator / Ceramic Resonator (see page 30) 1000 – 1111
Reserved 0101, 0111