Datasheet

106
2586N–AVR–04/11
ATtiny25/45/85
13.3.5 OCR1C – Timer/Counter1 Output Compare Register C
The Output Compare Register B - OCR1B from ATtiny15 is replaced with the output compare
register C - OCR1C that is an 8-bit read/write register. This register has the same function as the
Output Compare Register B in ATtiny15.
The Timer/Counter Output Compare Register C contains data to be continuously compared with
Timer/Counter1. A compare match does only occur if Timer/Counter1 counts to the OCR1C
value. A software write that sets TCNT1 and OCR1C to the same value does not generate a
compare match. If the CTC1 bit in TCCR1 is set, a compare match will clear TCNT1.
13.3.6 TIMSK – Timer/Counter Interrupt Mask Register
• Bit 7 – Res: Reserved Bit
This bit is a reserved bit in the ATtiny25/45/85 and always reads as zero.
• Bit 6 – OCIE1A: Timer/Counter1 Output Compare Interrupt Enable
When the OCIE1A bit is set (one) and the I-bit in the Status Register is set (one), the
Timer/Counter1 Compare MatchA, interrupt is enabled. The corresponding interrupt at vector
$003 is executed if a compare matchA occurs. The Compare Flag in Timer/Counter1 is set (one)
in the Timer/Counter Interrupt Flag Register.
• Bit 2 – TOIE1: Timer/Counter1 Overflow Interrupt Enable
When the TOIE1 bit is set (one) and the I-bit in the Status Register is set (one), the
Timer/Counter1 Overflow interrupt is enabled. The corresponding interrupt (at vector $004) is
executed if an overflow in Timer/Counter1 occurs. The Overflow Flag (Timer1) is set (one) in the
Timer/Counter Interrupt Flag Register - TIFR.
• Bit 0 – Res: Reserved Bit
This bit is a reserved bit in the ATtiny25/45/85 and always reads as zero.
13.3.7 TIFR – Timer/Counter Interrupt Flag Register
• Bit 7 – Res: Reserved Bit
This bit is a reserved bit in the ATtiny25/45/85 and always reads as zero.
Bit 76543210
0x2D MSB LSB OCR1C
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 1 1 1 1 1 1 1 1
Bit 7 6 5 4 3 2 1 0
0x39 –OCIE1A
OCIE1B OCIE0A OCIE0B TOIE1 TOIE0 – TIMSK
Read/Write R R/W R/W R/W R/W R/W R/W R
Initial value 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
0x38 –OCF1A
OCF1B OCF0A OCF0B TOV1 TOV0 – TIFR
Read/Write R R/W R/W R/W R/W R/W R/W R
Initial value 0 0 0 0 0 0 0 0