Datasheet

20
2586JS–AVR–12/06
ATtiny25/45/85
9. Datasheet Revision History
9.1 Rev. 2586J-12/06
1. Updated ”Low Power Consumption” on page 1.
2. Updated description of instruction length in “Architectural Overview” ,
starting on page 6.
3. Updated Flash size in ”In-System Re-programmable Flash Program
Memory” on page 14.
4. Updated cross-references in sections “Atomic Byte Programming” ,
“Erase” and “Write” , starting on page 16.
5. Updated ”Atomic Byte Programming” on page 16.
6. Updated ”Internal PLL for Fast Peripheral Clock Generation - clkPCK”
on page 23.
7. Replaced single clocking system figure with two: Figure 7-2 and Figure
7-3 on page 23.
8. Updated Table 7-1 on page 24, Table 7-4 on page 26 and Table 7-6 on
page 28.
9. Updated ”Calibrated Internal RC Oscillator” on page 27.
10. Updated Table 7-11 on page 29.
11. Updated ”OSCCAL – Oscillator Calibration Register” on page 31.
12. Updated ”CLKPR – Clock Prescale Register” on page 32.
13. Updated ”Power-down Mode” on page 35.
14. Updated “Bit 0” in ”PRR – Power Reduction Register” on page 38.
15. Added footnote to Table 9-3 on page 46.
16. Updated Table 12-5 on page 64.
17. Deleted “Bits 7, 2” in ”MCUCR – MCU Control Register” on page 65.
18. Updated and moved section “Timer/Counter0 Prescaler and Clock
Sources”, now located on page 67.
19. Updated ”Timer/Counter1 Initialization for Asynchronous Mode” on
page 89.
20. Updated bit description in ”PLLCSR – PLL Control and Status Register”
on page 97 and ”PLLCSR – PLL Control and Status Register” on page
107.
21. Added recommended maximum frequency in”Prescaling and Conver-
sion Timing” on page 129.
22. Updated Figure 19-8 on page 134 .
23. Updated ”Temperature Measurement” on page 138.
24. Updated Table 19-3 on page 139
.