Datasheet

17
2586JS–AVR–12/06
ATtiny25/45/85
8.2 Errata ATtiny45
The revision letter in this section refers to the revision of the ATtiny45 device.
8.2.1 Rev E
No known errata
8.2.2 Rev D
•
Reading EEPROM at low frequency may not work for frequencies below 900 kHz
1. Reading EEPROM at low frequency may not work for frequencies below 900 kHz
Reading data from the EEPROM at low internal clock frequency may result in wrong data
read.
Problem Fix/Workaround
Avoid using the EEPROM at clock frequency below 900kHz.
8.2.3 Rev B and C
•
PLL not locking
• EEPROM read from application code does not work in Lock Bit Mode 3
• Reading EEPROM at low frequency may not work for frequencies below 900 kHz
• Timer Counter 1 PWM output generation on OC1B- XOC1B does not work correctly
1. PLL not locking
When at frequencies below 6.0 MHz, the PLL will not lock
Problem fix / Workaround
When using the PLL, run at 6.0 MHz or higher.
2. EEPROM read from application code does not work in Lock Bit Mode 3
When the Memory Lock Bits LB2 and LB1 are programmed to mode 3, EEPROM read does
not work from the application code.
Problem Fix/Work around
Do not set Lock Bit Protection Mode 3 when the application code needs to read from
EEPROM.
3. Reading EEPROM at low frequency may not work for frequencies below 900 kHz
Reading data from the EEPROM at low internal clock frequency may result in wrong data
read.
Problem Fix/Workaround
Avoid using the EEPROM at clock frequency below 900kHz.
4. Timer Counter 1 PWM output generation on OC1B – XOC1B does not work correctly
Timer Counter1 PWM output OC1B-XOC1B does not work correctly. Only in the case when
the control bits, COM1B1 and COM1B0 are in the same mode as COM1A1 and COM1A0,
respectively, the OC1B-XOC1B output works correctly.
Problem Fix/Work around
The only workaround is to use same control setting on COM1A(1:0) and COM1B(1:0) con-
trol bits, see table 14-4 in the data sheet. The problem has been fixed for Tiny45 rev D.