Datasheet

177
ATtiny2313/V
2543F–AVR–08/04
3. “Min” means the lowest value where the pin is guaranteed to be read as high.
4. Although each I/O port can sink more than the test conditions (10 mA at V
CC
= 5V, 5 mA at V
CC
= 3V) under steady state
conditions (non-transient), the following must be observed:
1] The sum of all IOL, for all ports, should not exceed 60 mA.
If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater
than the listed test condition.
5. Although each I/O port can source more than the test conditions (10 mA at V
CC
= 5V, 5 mA at V
CC
= 3V) under steady state
conditions (non-transient), the following must be observed:
1] The sum of all IOH, for all ports, should not exceed 60 mA.
If IOH exceeds the test condition, VOH may exceed the related specification. Pins are not guaranteed to source current
greater than the listed test condition.
External Clock Drive
Waveforms
Figure 80. External Clock Drive Waveforms
External Clock Drive
V
IL1
V
IH1
Table 80. External Clock Drive (Estimated Values)
Symbol Parameter
V
CC
= 1.8 - 5.5V V
CC
= 4.5 - 5.5V
UnitsMin. Max. Min. Max. Min. Max.
1/t
CLCL
Oscillator
Frequency
0108016MHz
t
CLCL
Clock Period 1000 125 62.5 ns
t
CHCX
High Time 400 50 25 ns
t
CLCX
Low Time 400 50 25 ns
t
CLCH
Rise Time 2.0 1.6 0.5 µs
t
CHCL
Fall Time 2.0 1.6 0.5 µs
∆t
CLCL
Change in
period from one
clock cycle to
the next
22 2%