Datasheet

116
ATmega8(L)
2486M–AVR–12/03
Table 44 shows the COM21:0 bit functionality when the WGM21:0 bits are set to fast
PWM mode.
Note: 1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the
Compare Match is ignored, but the set or clear is done at TOP. See “Fast PWM
Mode” on page 110 for more details.
Table 45 shows the COM21:0 bit functionality when the WGM21:0 bits are set to phase
correct PWM mode.
Note: 1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the
Compare Match is ignored, but the set or clear is done at TOP. See “Phase Correct
PWM Mode” on page 111 for more details.
Table 43. Compare Output Mode, Non-PWM Mode
COM21 COM20 Description
0 0 Normal port operation, OC2 disconnected.
0 1 Toggle OC2 on Compare Match
1 0 Clear OC2 on Compare Match
1 1 Set OC2 on Compare Match
Table 44. Compare Output Mode, Fast PWM Mode
(1)
COM21 COM20 Description
0 0 Normal port operation, OC2 disconnected.
0 1 Reserved
1 0 Clear OC2 on Compare Match, set OC2 at TOP
1 1 Set OC2 on Compare Match, clear OC2 at TOP
Table 45. Compare Output Mode, Phase Correct PWM Mode
(1)
COM21 COM20 Description
0 0 Normal port operation, OC2 disconnected.
0 1 Reserved
1 0
Clear OC2 on Compare Match when up-counting. Set OC2 on Compare
Match when downcounting.
1 1
Set OC2 on Compare Match when up-counting. Clear OC2 on Compare
Match when downcounting.