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Atmel-8271IS-AVR- ATmega-Datasheet_10/2014

Features

 High Performance, Low Power Atmel

AVR

8-Bit Microcontroller Family

 Advanced RISC Architecture

̶ 131 Powerful Instructions – Most Single Clock Cycle Execution

̶ 32 x 8 General Purpose Working Registers

̶ Fully Static Operation

̶ Up to 20 MIPS Throughput at 20MHz

̶ On-chip 2-cycle Multiplier

 High Endurance Non-volatile Memory Segments

̶ 4/8/16/32KBytes of In-System Self-Programmable Flash program memory

̶ 256/512/512/1KBytes EEPROM

̶ 512/1K/1K/2KBytes Internal SRAM

̶ Write/Erase Cycles: 10,000 Flash/100,000 EEPROM

̶ Data retention: 20 years at 85C/100 years at 25C

(1)

̶ Optional Boot Code Section with Independent Lock Bits

 In-System Programming by On-chip Boot Program

 True Read-While-Write Operation

̶ Programming Lock for Software Security

 Atmel

QTouch

library support

̶ Capacitive touch buttons, sliders and wheels

̶ QTouch and QMatrix

acquisition

̶ Up to 64 sense channels

 Peripheral Features

̶ Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode

̶ One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and

Capture Mode

̶ Real Time Counter with Separate Oscillator

̶ Six PWM Channels

̶ 8-channel 10-bit ADC in TQFP and QFN/MLF package

 Temperature Measurement

̶ 6-channel 10-bit ADC in PDIP Package

 Temperature Measurement

̶ Programmable Serial USART

̶ Master/Slave SPI Serial Interface

̶ Byte-oriented 2-wire Serial Interface (Philips I

C compatible)

̶ Programmable Watchdog Timer with Separate On-chip Oscillator

̶ On-chip Analog Comparator

̶ Interrupt and Wake-up on Pin Change

ATmega48A/PA/88A/PA/168A/PA/328/P

ATMEL 8-BIT MICROCONTROLLER WITH 4/8/16/32KBYTES

IN-SYSTEM PROGRAMMABLE FLASH

DATASHEET SUMMARY

Summary of content (39 pages)

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ATmega48A/PA/88A/PA/168A/PA/328/P ATMEL 8-BIT MICROCONTROLLER WITH 4/8/16/32KBYTES IN-SYSTEM PROGRAMMABLE FLASH DATASHEET SUMMARY Features  High Performance, Low Power Atmel®AVR® 8-Bit Microcontroller Family  Advanced RISC Architecture ̶ 131 Powerful Instructions – Most Single Clock Cycle Execution ̶ 32 x 8 General Purpose Working Registers ̶ Fully Static Operation ̶ Up to 20 MIPS Throughput at 20MHz ̶ On-chip 2-cycle Multiplier  High Endurance Non-volatile Memory Segments ̶ 4/8/16/32KBytes of In-S
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 Special Microcontroller Features ̶ Power-on Reset and Programmable Brown-out Detection ̶ Internal Calibrated Oscillator ̶ External and Internal Interrupt Sources ̶ Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby, and Extended Standby  I/O and Packages ̶ 23 Programmable I/O Lines ̶ 28-pin PDIP, 32-lead TQFP, 28-pad QFN/MLF and 32-pad QFN/MLF  Operating Voltage: ̶ 1.8 - 5.5V  Temperature Range: ̶ -40C to 85C  Speed Grade: ̶ 0 - 4MHz@1.8 - 5.5V, 0 - 10MHz@2.7 - 5.5.
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Pin Configurations Figure 1-1.
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1.1 Pin Descriptions 1.1.1 VCC Digital supply voltage. 1.1.2 GND Ground. 1.1.3 Port B (PB7:0) XTAL1/XTAL2/TOSC1/TOSC2 Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated.
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1.1.7 AVCC AVCC is the supply voltage pin for the A/D Converter, PC3:0, and ADC7:6. It should be externally connected to VCC, even if the ADC is not used. If the ADC is used, it should be connected to VCC through a low-pass filter. Note that PC6...4 use digital supply voltage, VCC. 1.1.8 AREF AREF is the analog reference pin for the A/D Converter. 1.1.9 ADC7:6 (TQFP and QFN/MLF Package Only) In the TQFP and QFN/MLF package, ADC7:6 serve as analog inputs to the A/D converter.
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2. Overview The ATmega48A/PA/88A/PA/168A/PA/328/P is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega48A/PA/88A/PA/168A/PA/328/P achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. Block Diagram VCC Block Diagram GND Figure 2-1.
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The ATmega48A/PA/88A/PA/168A/PA/328/P provides the following features: 4K/8Kbytes of In-System Programmable Flash with Read-While-Write capabilities, 256/512/512/1Kbytes EEPROM, 512/1K/1K/2Kbytes SRAM, 23 general purpose I/O lines, 32 general purpose working registers, three flexible Timer/Counters with compare modes, internal and external interrupts, a serial programmable USART, a byte-oriented 2-wire Serial Interface, an SPI serial port, a 6-channel 10-bit ADC (8 channels in TQFP and QFN/MLF packages), a
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ATmega48A/PA/88A/PA/168A/PA/328/P support a real Read-While-Write Self-Programming mechanism. There is a separate Boot Loader Section, and the SPM instruction can only execute from there. In ATmega 48A/48PA there is no Read-While-Write support and no separate Boot Loader Section. The SPM instruction can execute from the entire Flash 3. Resources A comprehensive set of development tools, application notes and datasheets are available for download on http://www.atmel.com/avr. Note: 4. 1.
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7.
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Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page (0xC0) UCSR0A RXC0 TXC0 UDRE0 FE0 DOR0 UPE0 U2X0 MPCM0 191 (0xBF) Reserved – – – – – – – – – (0xBE) Reserved – – – – – – – (0xBD) TWAMR TWAM6 TWAM5 TWAM4 TWAM3 TWAM2 TWAM1 TWAM0 – (0xBC) TWCR TWINT TWEA TWSTA TWSTO TWWC TWEN – TWIE (0xBB) TWDR (0xBA) TWAR TWA6 TWA5 TWA4 TWA3 TWA2 TWA1 TWA0 TWGCE 232 (0xB9) TWSR TWS7 TWS6 TWS5 TWS4 TWS3 – TWPS1 TWPS0 231 2-wir
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Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page (0x7C) ADMUX REFS1 REFS0 ADLAR – MUX3 MUX2 MUX1 MUX0 248 (0x7B) ADCSRB – ACME – – – ADTS2 ADTS1 ADTS0 251 (0x7A) ADCSRA ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0 249 (0x79) ADCH ADC Data Register High byte 250 (0x78) ADCL ADC Data Register Low byte 250 (0x77) Reserved – – – – – – – – (0x76) Reserved – – – – – – – – (0x75) Reserved – – – – – – – – (0x74) Reser
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Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0x18 (0x38) Reserved – – – – – – – – Page 0x17 (0x37) TIFR2 – – – – – OCF2B OCF2A TOV2 158 0x16 (0x36) TIFR1 – – ICF1 – – OCF1B OCF1A TOV1 136 0x15 (0x35) TIFR0 – – – – – OCF0B OCF0A TOV0 0x14 (0x34) Reserved – – – – – – – – 0x13 (0x33) Reserved – – – – – – – – 0x12 (0x32) Reserved – – – – – – – – 0x11 (0x31) Reserved – – – – – – – – 0x10 (0x30) Reserved
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8.
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Mnemonics Operands Description Operation Flags #Clocks BIT AND BIT-TEST INSTRUCTIONS SBI P,b Set Bit in I/O Register I/O(P,b)  1 None CBI P,b Clear Bit in I/O Register I/O(P,b)  0 None 2 LSL Rd Logical Shift Left Rd(n+1)  Rd(n), Rd(0)  0 Z,C,N,V 1 2 LSR Rd Logical Shift Right Rd(n)  Rd(n+1), Rd(7)  0 Z,C,N,V 1 ROL Rd Rotate Left Through Carry Rd(0)C,Rd(n+1) Rd(n),CRd(7) Z,C,N,V 1 ROR Rd Rotate Right Through Carry Rd(7)C,Rd(n) Rd(n+1),CRd(0) Z,C,N,V 1 ASR
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Mnemonics WDR BREAK Note: Operands Description Watchdog Reset Break Operation (see specific descr. for WDR/timer) For On-chip Debug Only Flags None None #Clocks 1 N/A 1. These instructions are only available in ATmega168PA and ATmega328P.
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9. Ordering Information 9.1 ATmega48A Speed (MHz) 20(3) Note: Power Supply (V) 1.8 - 5.5 Ordering Code(2) Package(1) ATmega48A-AU ATmega48A-AUR(5) ATmega48A-CCU ATmega48A-CCUR(5) ATmega48A-MMH(4) ATmega48A-MMHR(4)(5) ATmega48A-MU ATmega48A-MUR(5) ATmega48A-PU 32A 32A 32CC1 32CC1 28M1 28M1 32M1-A 32M1-A 28P3 Operational Range(6) Industrial (-40C to 85C) 1. This device can also be supplied in wafer form.
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9.2 ATmega48PA Speed (MHz)(3) 20 Note: Power Supply (V) 1.8 - 5.
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9.3 ATmega88A Speed (MHz) 20(3) Note: Power Supply (V) 1.8 - 5.5 Ordering Code(2) Package(1) ATmega88A-AU ATmega88A-AUR(5) ATmega88A-CCU ATmega88A-CCUR(5) ATmega88A-MMH(4) ATmega88A-MMHR(4)(5) ATmega88A-MU ATmega88A-MUR(5) ATmega88A-PU 32A 32A 32CC1 32CC1 28M1 28M1 32M1-A 32M1-A 28P3 Operational Range(6) Industrial (-40C to 85C) 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. 3. 4. 5.
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9.4 ATmega88PA Speed (MHz)(3) 20 Note: Power Supply (V) 1.8 - 5.
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9.5 ATmega168A Speed (MHz)(3) 20 Note: Power Supply (V) 1.8 - 5.5 Ordering Code(2) Package(1) ATmega168A-AU ATmega168A-AUR(5) ATmega168A-CCU ATmega168A-CCUR(5) ATmega168A-MMH(4) ATmega168A-MMHR(4)(5) ATmega168A-MU ATmega168A-MUR(5) ATmega168A-PU 32A 32A 32CC1 32CC1 28M1 28M1 32M1-A 32M1-A 28P3 Operational Range(6) Industrial (-40C to 85C) 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2.
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9.6 ATmega168PA Speed (MHz)(3) 20 20 Note: Ordering Code(2) Package(1) 1.8 - 5.5 ATmega168PA-AU ATmega168PA-AUR(5) ATmega168PA-CCU ATmega168PA-CCUR(5) ATmega168PA-MMH(4) ATmega168PA-MMHR(4)(5) ATmega168PA-MU ATmega168PA-MUR(5) ATmega168PA-PU 32A 32A 32CC1 32CC1 28M1 28M1 32M1-A 32M1-A 28P3 Industrial (-40C to 85C) 1.8 - 5.
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9.7 ATmega328 Speed (MHz) 20(3) Note: Power Supply (V) 1.8 - 5.5 Ordering Code(2) Package(1) ATmega328-AU ATmega328-AUR(5) ATmega328-MMH(4) ATmega328-MMHR(4)(5) ATmega328-MU ATmega328-MUR(5) ATmega328-PU 32A 32A 28M1 28M1 32M1-A 32M1-A 28P3 Operational Range(6) Industrial (-40C to 85C) 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. 3. 4. 5. 6.
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9.8 ATmega328P Speed (MHz)(3) 20 Note: Power Supply (V) 1.8 - 5.5 Ordering Code(2) Package(1) ATmega328P-AU ATmega328P-AUR(5) ATmega328P-MMH(4) ATmega328P-MMHR(4)(5) ATmega328P-MU ATmega328P-MUR(5) ATmega328P-PU 32A 32A 28M1 28M1 32M1-A 32M1-A 28P3 Industrial (-40C to 85C) ATmega328P-AN ATmega328P-ANR(5) ATmega328P-MN ATmega328P-MNR(5) ATmega328P-PN 32A 32A 32M1-A 32M1-A 28P3 Industrial (-40C to 105C) Operational Range 1. This device can also be supplied in wafer form.
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10. Packaging Information 10.1 32A PIN 1 IDENTIFIER PIN 1 e B E1 E D1 D C 0°~7° A1 A2 A L COMMON DIMENSIONS (Unit of measure = mm) MIN NOM MAX A – – 1.20 A1 0.05 – 0.15 A2 0.95 1.00 1.05 D 8.75 9.00 9.25 D1 6.90 7.00 7.10 E 8.75 9.00 9.25 E1 6.90 7.00 7.10 SYMBOL Notes: 1. This package conforms to JEDEC reference MS-026, Variation ABA. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25mm per side.
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10.2 32CC1 1 2 3 4 5 6 0.08 A B Pin#1 ID C D SIDE VIEW D E b1 F A1 E A A2 TOP VIEW E1 e 1 2 3 4 5 32-Øb 6 F D1 A1 BALL CORNER COMMON DIMENSIONS (Unit of Measure = mm) E D SYMBOL C B A e BOTTOM VIEW MIN NOM MAX A – – 0.60 A1 0.12 – – A2 0.38 REF b 0.25 0.30 0.35 1 b1 0.25 – – 2 D 3.90 4.00 4.10 D1 2.50 BSC E 3.90 4.00 E1 Note1: Dimension “b” is measured at the maximum ball dia. in a plane parallel to the seating plane.
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10.3 28M1 D C 1 2 Pin 1 ID 3 E SIDE VIEW A1 TOP VIEW A y D2 K 1 0.45 2 R 0.20 COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM MAX A 0.80 0.90 1.00 A1 0.00 0.02 0.05 b 0.17 0.22 0.27 SYMBOL 3 E2 b C L e 0.4 Ref (4x) Note: 0.20 REF D 3.95 4.00 D2 2.35 2.40 2.45 E 3.95 4.00 4.05 E2 2.35 2.40 2.45 e BOTTOM VIEW The terminal #1 ID is a Laser-marked Feature. NOT E 4.05 0.45 L 0.35 0.40 0.45 y 0.00 – 0.08 K 0.
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10.4 32M1-A D D1 1 2 3 0 Pin 1 ID E1 SIDE VIEW E TOP VIEW A3 A2 A1 A K 0.08 C P D2 1 2 3 P Pin #1 Notch (0.20 R) K e SYMBOL MIN NOM MAX A 0.80 0.90 1.00 A1 – 0.02 0.05 A2 – 0.65 1.00 A3 E2 b COMMON DIMENSIONS (Unit of Measure = mm) L BOTTOM VIEW 0.20 REF b 0.18 0.23 0.30 D 4.90 5.00 5.10 D1 4.70 4.75 4.80 D2 2.95 3.10 3.25 E 4.90 5.00 5.10 E1 4.70 4.75 4.80 E2 2.95 3.10 3.25 e L Note: JEDEC Standard MO-220, Fig.
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10.5 28P3 D PIN 1 E1 A SEATING PLANE L B2 B1 A1 B (4 PLACES) 0º ~ 15º REF e E C eB Note: 1. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25mm (0.010"). COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A – – 4.5724 A1 0.508 – D 34.544 – E 7.620 – E1 7.112 – 7.493 B 0.381 – 0.533 B1 1.143 – 1.397 B2 0.762 – 1.143 L 3.175 – 3.429 C 0.203 – 0.356 eB – – 10.160 e NOTE – 34.
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11. Errata 11.1 Errata ATmega48A The revision letter in this section refers to the revision of the ATmega48A device. 11.1.1 Rev. D • Analog MUX can be turned off when setting ACME bit • TWI Data setup time can be too short 1. Analog MUX can be turned off when setting ACME bit If the ACME (Analog Comparator Multiplexer Enabled) bit in ADCSRB is set while MUX3 in ADMUX is '1' (ADMUX[3:0]=1xxx), all MUXes are turned off until the ACME bit is cleared.
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If the ACME (Analog Comparator Multiplexer Enabled) bit in ADCSRB is set while MUX3 in ADMUX is '1' (ADMUX[3:0]=1xxx), all MU Xes are turned off until the ACME bit is cleared. Problem Fix/Workaround Clear the MUX3 bit before setting the ACME bit. 2. TWI Data setup time can be too short When running the device as a TWI slave with a system clock above 2MHz, the data setup time for the first bit after ACK may in some cases be too short. This may cause a false start or stop condition on the TWI line.
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When running the device as a TWI slave with a system clock above 2MHz, the data setup time for the first bit after ACK may in some cases be too short. This may cause a false start or stop condition on the TWI line. Problem Fix/Workaround Insert a delay between setting TWDR and TWCR. 11.4.2 Rev. A • Power consumption in power save modes • Startup time for the device 1.
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11.6.1 Rev E • Analog MUX can be turned off when setting ACME bit • TWI Data setup time can be too short 1. Analog MUX can be turned off when setting ACME bit If the ACME (Analog Comparator Multiplexer Enabled) bit in ADCSRB is set while MUX3 in ADMUX is '1' (ADMUX[3:0]=1xxx), all MUXes are turned off until the ACME bit is cleared. Problem Fix/Workaround Clear the MUX3 bit before setting the ACME bit. 2.
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11.7 Errata ATmega328 The revision letter in this section refers to the revision of the ATmega328 device. 11.7.1 Rev D • Analog MUX can be turned off when setting ACME bit • TWI Data setup time can be too short 1. Analog MUX can be turned off when setting ACME bit If the ACME (Analog Comparator Multiplexer Enabled) bit in ADCSRB is set while MUX3 in ADMUX is '1' (ADMUX[3:0]=1xxx), all MUX es are turned off until the ACME bit is cleared.
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Problem Fix/Workaround Clear the MUX3 bit before setting the ACME bit. 2. Unstable 32kHz Oscillator The 32kHz oscillator does not work as system clock. The 32kHz oscillator used as asynchronous timer is inaccurate. Problem Fix/ Workaround None. 11.8 Errata ATmega328P The revision letter in this section refers to the revision of the ATmega328P device. 11.8.1 Rev D • Analog MUX can be turned off when setting ACME bit • TWI Data setup time can be too short 1.
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None. 11.8.4 Rev A • Unstable 32kHz Oscillator 1. Unstable 32kHz Oscillator The 32kHz oscillator does not work as system clock. The 32kHz oscillator used as asynchronous timer is inaccurate. Problem Fix/ Workaround None.
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12. Datasheet Revision History Please note that the referring page numbers in this section are referred to this document. The referring revision in this section are referring to the document revision. 12.1 1. 12.2 1. 2. 3. 4. 5. 6. 7. 7. 8. 12.3 1. 2. 3. 4. 5. 12.4 1. 2. 3. 4. 5. Rev. 8271I – 10/2014 Several headings have been corrected and electrical characteristics for 105°C have been structured. Rev. 8271H – 08/2014 Updated text in section Section 16.9.
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12.5 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 12.6 1. 2. 3. 4. 5. 6. 7. 8. 12.7 1. 2. 3. 4. 12.8 1. 2. 3. 4. 5. Rev. 8271E – 07/2012 Updated Figure 1-1 on page 3. Overlined “RESET” in 28 MLF top view and in 32 MLF top view. Added EEAR9 bit to the ”EEARH and EEARL – The EEPROM Address Register” on page 22 and updated the all bit descriptions accordingly.
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12.9 1. 2 Rev. 8271A – 12/09 New datasheet 8271 with merged information for ATmega48PA, ATmega88PA, ATmega168PA and ATmega48A, ATmega88A andATmega168A. Also included information on ATmega328 and ATmega328P Changes done: ̶ ̶ ̶ ̶ ̶ ̶ ̶ ̶ ̶ ̶ New devices added: ATmega48A/ATmega88A/ATmega168A and ATmega328 Updated Feature Description Updated Table 2-1 on page 7 Added note for BOD Disable on page 40.
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