Datasheet

430
8011K–AVR–09/08
ATmega164P/324P/644P
34.4 Rev. 8011H- 04/08
34.5 Rev. 8011G- 08/07
34.6 Rev. 8011F- 04/07
34.7 Rev. 8011E - 04/07
1. Added 44-pad DRQFN pinout for ATmega164P in ”Pinout - DRQFN” on page 3.
2. Added note to ”Address Match Unit” on page 215.
3. Updated ATmega164P ”Ordering Information” on page 421.
4. Added 44-lead QFN (44MC) to ”Packaging Information” on page 424.
1. Updated ”Features” on page 1
2. Added ”Data Retention” on page 9.
3. Updated ”SPH and SPL – Stack Pointer High and Stack pointer Low” on page 15.
4. LCD reference removed from table note in ”Sleep Modes” on page 43.
5. Updated code example in ”Bit 0 – IVCE: Interrupt Vector Change Enable” on page 66.
6. Removed reference to External Memory Interface in ”Alternate Functions of Port A” on
page 81.
7. Updated ”Data Reception – The USART Receiver” on page 181.
8. Updated ”ADCSRB – ADC Control and Status Register B” on page 239.
9. Updated overview in ”ADC - Analog-to-digital Converter” on page 241.
10. Added ”ATmega644P Typical Characteristic” on page 389.
11. Updated Figure 28-31 on page 355, Figure 28-32 on page 356,Figure 28-33 on page
356
12. Updated notes in Table 8-3 on page 33.Table 8-8 on page 36, Table 8-9 on page 37,
and Table 8-11 on page 38.
13. Updated Table 13-7 on page 85, Table 13-8 on page 85, Table 13-10 on page 87,
Table 13-11 on page 88, Table 13-14 on page 91, Table 27-1 on page 328,Table 27-2
on page 328,Table 27-5 on page 331, Table 27-9 on page 333, and Table 27-12 on
page 337
14. Updated ”ATmega324P DC Characteristics” on page 328 and ”ATmega644P DC Char-
acteristics” on page 329.
15. Updated Table 27-7 on page 332 and Table 8-13 on page 38.
1. Updated ”Watchdog Timer Configuration” on page 60.
1. Updated ”GTCCR – General Timer/Counter Control Register” on page 160.
2. Updated ”EECR – The EEPROM Control Register” on page 24
.