Datasheet

109
2467X–AVR–06/11
ATmega128
Timer/Counter
Prescaler
Figure 45. Prescaler for Timer/Counter0
The clock source for Timer/Counter0 is named clk
T0
. clk
T0
is by default connected to the main
system clock clk
I/O
. By setting the AS0 bit in ASSR, Timer/Counter0 is asynchronously clocked
from the TOSC1 pin. This enables use of Timer/Counter0 as a Real Time Counter (RTC). When
AS0 is set, pins TOSC1 and TOSC2 are disconnected from Port C. A crystal can then be con-
nected between the TOSC1 and TOSC2 pins to serve as an independent clock source for
Timer/Counter0. The Oscillator is optimized for use with a 32.768kHz crystal. Applying an exter-
nal clock source to TOSC1 is not recommended.
For Timer/Counter0, the possible prescaled selections are: clk
T0S
/8, clk
T0S
/32, clk
T0S
/64,
clk
T0S
/128, clk
T0S
/256, and clk
T0S
/1024. Additionally, clk
T0S
as well as 0 (stop) may be selected.
Setting the PSR0 bit in SFIOR resets the prescaler. This allows the user to operate with a pre-
dictable prescaler.
Special Function IO
Register – SFIOR
• Bit 7 – TSM: Timer/Counter Synchronization Mode
Writing the TSM bit to one activates the Timer/Counter Synchronization mode. In this mode, the
value that is written to the PSR0 and PSR321 bits is kept, hence keeping the corresponding
prescaler reset signals asserted. This ensures that the corresponding Timer/Counters are halted
and can be configured to the same value without the risk of one of them advancing during con-
figuration. When the TSM bit is written to zero, the PSR0 and PSR321 bits are cleared by
hardware, and the Timer/Counters start counting simultaneously.
10-BIT T/C PRESCALER
TIMER/COUNTER0 CLOCK SOURCE
clk
I/O
clk
T0S
TOSC1
AS0
CS00
CS01
CS02
clk
T0S
/8
clk
T0S
/64
clk
T0S
/128
clk
T0S
/1024
clk
T0S
/256
clk
T0S
/32
0
PSR0
Clear
clk
T0
Bit 7 6 5 4 3 2 1 0
TSM
– – – ACME PUD PSR0 PSR321 SFIOR
Read/Write R/W RRRR/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0