Datasheet

94
2549O–AVR–05/12
ATmega640/1280/1281/2560/2561
13.3.9 Alternate Functions of Port J
The Port J alternate pin configuration is as follows:
PCINT15:12 - Port J, Bit 6:3
PCINT15:12, Pin Change Interrupt Source 15:12. The PJ6:3 pins can serve as External Interrupt
Sources.
XCK2/PCINT11 - Port J, Bit 2
XCK2, USART 2 External Clock. The Data Direction Register (DDJ2) controls whether the clock
is output (DDJ2 set) or input (DDJ2 cleared). The XCK2 pin is active only when the USART2
operates in synchronous mode.
PCINT11, Pin Change Interrupt Source 11. The PJ2 pin can serve as External Interrupt
Sources.
Table 13-26. Overriding Signals for Alternate Functions in PH3:PH0
Signal Name PH3/OC4A PH2/XCK2 PH1/TXD2 PH0/RXD2
PUOE 0 0 TXEN2RXEN2
PUOV 0 0 0 PORTH0 • PUD
DDOE 0
XCK2 OUTPUT
ENABLE
TXEN2RXEN2
DDOV0 110
PVOE OC4A ENABLE
XCK2 OUTPUT
ENABLE
TXEN20
PVOV OC4A XCK2 TXD2 0
PTOE –––
DIEOE0 000
DIEOV0 000
DI 0 XC2K INPUT 0 RXD2
AIO –––
Table 13-27. Port J Pins Alternate Functions
Port Pin Alternate Function
PJ7
PJ6 PCINT15 (Pin Change Interrupt 15)
PJ5 PCINT14 (Pin Change Interrupt 14)
PJ4 PCINT13 (Pin Change Interrupt 13)
PJ3 PCINT12 (Pin Change Interrupt 12)
PJ2 XCK3/PCINT11 (USART3 External Clock or Pin Change Interrupt 11)
PJ1 TXD3/PCINT10 (USART3 Transmit Pin or Pin Change Interrupt 10)
PJ0 RXD3/PCINT9 (USART3 Receive Pin or Pin Change Interrupt 9)