Datasheet

91
2549O–AVR–05/12
ATmega640/1280/1281/2560/2561
OC0B – Port G, Bit 5
OC0B, Output Compare match B output: The PG5 pin can serve as an external output for the
TImer/Counter0 Output Compare. The pin has to be configured as an output (DDG5 set) to
serve this function. The OC0B pin is also the output pin for the PWM mode timer function.
TOSC1 – Port G, Bit 4
TOSC2, Timer Oscillator pin 1: When the AS2 bit in ASSR is set (one) to enable asynchronous
clocking of Timer/Counter2, pin PG4 is disconnected from the port, and becomes the input of the
inverting Oscillator amplifier. In this mode, a Crystal Oscillator is connected to this pin, and the
pin can not be used as an I/O pin.
TOSC2 – Port G, Bit 3
TOSC2, Timer Oscillator pin 2: When the AS2 bit in ASSR is set (one) to enable asynchronous
clocking of Timer/Counter2, pin PG3 is disconnected from the port, and becomes the inverting
output of the Oscillator amplifier. In this mode, a Crystal Oscillator is connected to this pin, and
the pin can not be used as an I/O pin.
ALE – Port G, Bit 2
ALE is the external data memory Address Latch Enable signal.
•RD
– Port G, Bit 1
RD
is the external data memory read control strobe.
•WR
– Port G, Bit 0
WR
is the external data memory write control strobe.
Table 13-22 on page 91 and Table 13-23 on page 92 relates the alternate functions of Port G to
the overriding signals shown in Figure 13-5 on page 76.
Table 13-22. Overriding Signals for Alternate Functions in PG5:PG4
Signal Name PG5/OC0B PG4/TOSC1
PUOE AS2
PUOV––– 0
DDOE AS2
DDOV 0
PVOE OC0B Enable 0
PVOV OC0B 0
PTOE–––
DIEOE AS2
DIEOV EXCLK
DI–––
AIO T/C2 OSC INPUT