Datasheet

339
2549O–AVR–05/12
ATmega640/1280/1281/2560/2561
30.6.1 Signal Names
In this section, some pins of the ATmega640/1280/1281/2560/2561 are referenced by signal
names describing their functionality during parallel programming, see Figure 30-1 and Table 30-
9. Pins not described in the following table are referenced by pin names.
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse.
The bit coding is shown in Table 30-12 on page 340.
When pulsing WR
or OE, the command loaded determines the action executed. The different
commands are shown in Table 30-13 on page 340.
Figure 30-1. Parallel Programming
(1)
Note: 1. Unused Pins should be left floating.
Table 30-9. Pin Name Mapping
Signal Name in
Programming Mode Pin Name I/O Function
RDY/BSY
PD1 O
0: Device is busy programming, 1: Device is ready for
new command
OE
PD2 I Output Enable (Active low)
WR
PD3 I Write Pulse (Active low)
BS1 PD4 I Byte Select 1
XA0 PD5 I XTAL Action Bit 0
XA1 PD6 I XTAL Action Bit 1
PAGEL PD7 I Program Memory and EEPROM data Page Load
BS2 PA0 I Byte Select 2
DATA PB7-0 I/O Bi-directional Data bus (Output when OE is low
)
VCC
+5V
GND
XT AL1
PD1
PD2
PD3
PD4
PD5
PD6
PB7 - PB0 DATA
RESET
PD7
+12V
BS1
XA0
XA1
OE
RD Y / B SY
PAGEL
PA0
WR
BS2
AVCC
+5V