Datasheet

292
2549O–AVR–05/12
ATmega640/1280/1281/2560/2561
Note: 1. To reach the given accuracy, 10× or 200× Gain should not be used for operating voltage below
2.7V.
26.8.3 ADCSRA – ADC Control and Status Register A
• Bit 7 – ADEN: ADC Enable
Writing this bit to one enables the ADC. By writing it to zero, the ADC is turned off. Turning the
ADC off while a conversion is in progress, will terminate this conversion.
101000
(1)
N/A
ADC8 ADC8 10×
101001
(1)
ADC9 ADC8 10×
101010
(1)
ADC8 ADC8 200×
101011
(1)
ADC9 ADC8 200×
101100
(1)
ADC10 ADC10 10×
101101
(1)
ADC11 ADC10 10×
101110
(1)
ADC10 ADC10 200×
101111
(1)
ADC11 ADC10 200×
110000 ADC8 ADC9 1×
110001 ADC9 ADC9 1×
110010 ADC10 ADC9 1×
110011 ADC11 ADC9 1×
110100 ADC12 ADC9 1×
110101 ADC13 ADC9 1×
110110 ADC14 ADC9 1×
110111 ADC15 ADC9 1×
111000 ADC8 ADC10 1×
111001 ADC9 ADC10 1×
111010 ADC10 ADC10 1×
111011 ADC11 ADC10 1×
111100 ADC12 ADC10 1×
111101
N/A ADC13 ADC10 1×
111110 Reserved
N/A
111111 Reserved
N/A
Table 26-4. Input Channel Selections (Continued)
MUX5:0
Single Ended
Input
Positive Differential
Input
Negative Differential
Input Gain
Bit 76543210
(0x7A) ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0 ADCSRA
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000