Datasheet
233
2549O–AVR–05/12
ATmega640/1280/1281/2560/2561
A comparison of the USART in MSPIM mode and the SPI pins is shown in Table 23-4 on page
240.
23.2.1 Clock Generation
The Clock Generation logic generates the base clock for the Transmitter and Receiver. For
USART MSPIM mode of operation only internal clock generation (that is, master operation) is
supported. The Data Direction Register for the XCKn pin (DDR_XCKn) must therefore be set to
one (that is, as output) for the USART in MSPIM to operate correctly. Preferably the DDR_XCKn
should be set up before the USART in MSPIM is enabled (that is, TXENn and RXENn bit set to
one).
The internal clock generation used in MSPIM mode is identical to the USART synchronous mas-
ter mode. The baud rate or UBRRn setting can therefore be calculated using the same
equations, see Table 23-1.
Note: 1. The baud rate is defined to be the transfer rate in bit per second (bps).
BAUD Baud rate (in bits per second, bps).
f
OSC
System Oscillator clock frequency.
UBRRn Contents of the UBRRnH and UBRRnL Registers, (0-4095).
23.3 SPI Data Modes and Timing
There are four combinations of XCKn (SCK) phase and polarity with respect to serial data, which
are determined by control bits UCPHAn and UCPOLn. The data transfer timing diagrams are
shown in Figure 23-1 on page 234. Data bits are shifted out and latched in on opposite edges of
the XCKn signal, ensuring sufficient time for data signals to stabilize. The UCPOLn and
UCPHAn functionality is summarized in Table 23-2. Note that changing the setting of any of
these bits will corrupt all ongoing communication for both the Receiver and Transmitter.
Table 23-1. Equations for Calculating Baud Rate Register Setting
Operating Mode
Equation for Calculating Baud
Rate
(1)
Equation for Calculating
UBRRn Value
Synchronous Master
mode
BAUD
f
OSC
2 UBRRn 1+
---------------------------------------=
UBRRn
f
OSC
2BAUD
-------------------- 1–=
Table 23-2. UCPOLn and UCPHAn Functionality-
UCPOLn UCPHAn SPI Mode Leading Edge Trailing Edge
0 0 0 Sample (Rising) Setup (Falling)
0 1 1 Setup (Rising) Sample (Falling)
1 0 2 Sample (Falling) Setup (Rising)
1 1 3 Setup (Falling) Sample (Rising)