Datasheet

189
2549O–AVR–05/12
ATmega640/1280/1281/2560/2561
Table 20-7 shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to phase cor-
rect PWM mode.
Note: 1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See “Phase Correct PWM Mode” on
page 179 for more details.
• Bits 3, 2 – Res: Reserved Bits
These bits are reserved bits and will always read as zero.
• Bits 1:0 – WGM21:0: Waveform Generation Mode
Combined with the WGM22 bit found in the TCCR2B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see Table 20-8. Modes of operation supported by the Timer/Counter
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of
Pulse Width Modulation (PWM) modes (see “Modes of Operation” on page 176).
Notes: 1. MAX = 0xFF.
2. BOTTOM = 0x00.
Table 20-7. Compare Output Mode, Phase Correct PWM Mode
(1)
COM2B1 COM2B0 Description
00 Normal port operation, OC2B disconnected
01 Reserved
10
Clear OC2B on Compare Match when up-counting
Set OC2B on Compare Match when down-counting
11
Set OC2B on Compare Match when up-counting
Clear OC2B on Compare Match when down-counting
Table 20-8. Waveform Generation Mode Bit Description
Mode WGM2 WGM1 WGM0
Timer/Counter
Mode of
Operation TOP
Update of
OCRx at
TOV Flag
Set on
(1)(2)
0000 Normal 0xFF Immediate MAX
1001
PWM, Phase
Correct
0xFF TOP BOTTOM
2 0 1 0 CTC OCRA Immediate MAX
3011 Fast PWM0xFFBOTTOMMAX
4100 Reserved – – –
5101
PWM, Phase
Correct
OCRA TOP BOTTOM
6110 Reserved – – –
7111 Fast PWM OCRA BOTTOM TOP