Datasheet

165
2549O–AVR–05/12
ATmega640/1280/1281/2560/2561
17.11.27 OCR5BH and OCR5BL – Output Compare Register 5 B
17.11.28 OCR5CH and OCR5CL –Output Compare Register 5 C
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNTn). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OCnx pin.
The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are
written simultaneously when the CPU writes to these registers, the access is performed using an
8-bit temporary High Byte Register (TEMP). This temporary register is shared by all the other
16-bit registers. See “Accessing 16-bit Registers” on page 138.
17.11.29 ICR1H and ICR1L – Input Capture Register 1
17.11.30 ICR3H and ICR3L – Input Capture Register 3
17.11.31 ICR4H and ICR4L – Input Capture Register 4
17.11.32 ICR5H and ICR5L – Input Capture Register 5
Bit 76543210
(0x12B) OCR5B[15:8] OCR5BH
(0x12A) OCR5B[7:0] OCR5BL
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
(0x12D) OCR5C[15:8] OCR5CH
(0x12C) OCR5C[7:0] OCR5CL
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
(0x87) ICR1[15:8] ICR1H
(0x86) ICR1[7:0] ICR1L
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
(0x97) ICR3[15:8] ICR3H
(0x96) ICR3[7:0] ICR3L
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
(0xA7) ICR4[15:8] ICR4H
(0xA6) ICR4[7:0] ICR4L
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
(0x127) ICR5[15:8] ICR5H
(0x126) ICR5[7:0] ICR5L
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0