File ata5283

11
ATA5283 [Preliminary]
4598D–AUTO–03/04
4Interface
4.1 Reset input level high 5 V
HRESET
0.8 ×
V
DD
V
DD
VA
4.1.1 Reset pulse width V
RESET
= V
DD
5t
RESET
20 µs A
4.2 Reset input level low 5 V
LRESET
0
0.2 ×
V
DD
VC
4.3
Reset input leakage current
low
V
RESET
= V
SS
5I
IL
-0.2 0 µA A
4.4
Reset input leakage current
high
V
RESET
= V
DD
5I
IH
00.2µAA
4.5
N_WAKEUP output level
high
I
NWAKEUP
= -100 µA 7 V
HNWAKE
0.8 ×
V
DD
V
DD
VA
4.6 N_WAKEUP output level low I
NWAKEUP
= 100 µA 7 V
LNWAKE
0
0.2 ×
V
DD
VA
4.7 N_DATA output level high I
N_DATA
= -100 µA 6 V
HNDATA
0.8 ×
V
DD
V
DD
VA
4.8 N_DATA output level low I
N_DATA
= 100 µA 6 V
LNDATA
0
0.2 ×
V
DD
VA
5 Power Supply and Reset
5.1
V
DD
power on reset
threshold
V
POR
11.51.9 V A
5.2 Power-up time
Switch on V
DD
to
circuit active
t
PON
100 ms C
5.3
RESET reactivation caused
by negative spikes on V
DD
t
BDN
= 500 ns 7 t
RST
10 200 µs C
Electrical Characteristics (Continued)
V
SS
= 0 V, V
DD
= 2 V to 3.8 V, T
amb
= -40°C to +105°C, characterized up to 125°C, unless other specified
No. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type*
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter