User guide

Evaluation Kit Hardware
Evaluation Kit (EK) User Guide 4-39
11115A–ATARM–27-Jul-11
Figure 4-34. LCD and ISI Expansion
4.3.4 Configuration
This section describes the PIO usage, the jumpers, the test points and the solder drops of the EK board.
4.3.4.1 JTAG/ICE Configuration
4.3.4.2 Boot Mode Select Configuration
LCD_DETECT
3V3_LCD
LCDDAT8
LCDDAT10
LCDDEN
AD0_XP
AD2_Y P
LCDDAT1
LCDDAT21
LCDDAT23
LCDDAT17
LCDDAT19
LCDDAT3
AD4_LR
LCDDAT7
LCDDAT5
LCDDAT9
3V3
5V_INTER
J3
TSM-120-01-L-DV-A
1 2
3 4
5 6
7 8
9 10
11 12
13
15
17
19
14
16
18
20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
LCDDAT11
J2
TSM-115-01-L-DV-A
1 2
3 4
5 6
7 8
9 10
11 12
13
15
17
19
14
16
18
20
21 22
23 24
25 26
27 28
29 30
LCDPWM
LCDHSYNC
LCDPCK
LCDDAT16
LCDDAT18
LCDDAT20
R22 0R
LCDDAT22
LCDDAT15
LCDDAT14
AD3_Y M
LCDDAT13
LCDDAT12
LCDDISP
AD1_XM
LCDVSY NC
LCDDAT4
LCDDAT6
LCDDAT0
LCDDAT2
SELCONFIG
CHANGE#
TWCK0 TWD0
ZB_IRQ0
R19 0R
ONE_WIRE
R5 0R DNP
R23 0R
R6 0R DNP
Table 4-9. JTAG/ICE
Designation Default Setting Feature
R50 Not Populated Disables the ICE NTRST input
R51 Populated
Enables the ICE RTCK return. R94 must
be opened
R54 Populated Enables the ICE NRST input
R58 Not Populated Disables TCK <-> RTCK local loop
Table 4-10. BMS
Designation Default Setting Feature
JP9 Open
Default to boot on embedded ROM
Close to boot on external memory