User guide

Evaluation Kit Hardware
4-32 Evaluation Kit (EK) User Guide
11115A–ATARM–27-Jul-11
Ethernet 1 is only available for SAM9X25. The PHY on Ethernet 1 is enabled by the SELCONFIG signal
from a pull-down resistor on the CM board. Refer to Section 4.4.1 ”DM Board Overview” for detail.
Some pins (PC16, PC20, PC21, PC28, PC26 and PC29) are configured as Ethernet 1 input from PHY
for SAM9X25, whereas they are configured as LCD data pins on other processors. An IO buffer MN17 is
inserted in series with these signals to prevent the LCD from being disturbed by unknown status of the
PHY device.