SAM9G15-EK SAM9G25-EK SAM9G35-EK SAM9X25-EK SAM9X35-EK ...................................................................................................................
1-2 11115A–ATARM–27-Jul-11 Evaluation Kit (EK) User Guide
Section 1 Introduction .................................................................................................................1-1 1.1 Scope ................................................................................................................................. 1-1 1.2 Applicable Documents ....................................................................................................... 1-2 Section 2 Kit Contents ....................................................................
.4.4 Schematics ........................................................................................................ 4-82 Section 5 Revision History..........................................................................................................5-1 5.1 Revision History .................................................................................................................
Section 1 Introduction 1.
Introduction Figure 1-1. 1.2 Board Photo (Display module is optional) Applicable Documents Table 1-1. Applicable Documents Reference Title Comment Atmel lit° 11052 Atmel lit° 11032 Atmel lit° 11054 Atmel lit° 11053 Atmel lit° 11055 SAM9G15 datasheet SAM9G25 datasheet SAM9X25 datasheet SAM9G35 datasheet SAM9X35 datasheet These documents provide technical support for each one of the Atmel ARM-based Embedded MPU products supported by these Evaluation Kits. The datasheets can be found on www.atmel.
Section 2 Kit Contents 2.1 Deliverables The Evaluation Kits include: Board – One EK board – One of the five available CPU modules (CM) SAM9G15-CM SAM9G35-CM SAM9X35-CM SAM9G25-CM SAM9X25-CM – One optional DM board featured in SAM9G15, SAM9G35, SAM9X35 kits only.
Kit Contents Figure 2-1. Unpacked Evaluation Kit Unpack and inspect the kit carefully. Contact your local Atmel distributor, should there be issues concerning the contents of the kit. 2.2 Evaluation Board Specifications Table 2-1.
Kit Contents 2.3 Electrostatic Warning The Evaluation Kit is shipped in a protective anti-static package. The board system must not be subjected to high electrostatic potentials. A grounding strap or similar ESD protective device should be worn when handling the board in hostile ESD environments (offices with synthetic carpet, for example). Avoid touching the component pins or any other metallic element on the board.
Section 3 Power Up 3.1 Power Up the Board Unpack the board taking care to avoid electrostatic discharge. Unpack the power supply, select the right power plug adapter corresponding to that of your country, and insert it in the power supply. Connect the power supply DC connector to the board and plug the power supply to an AC power plug. The board LCD should light up and display a welcome page. Then, click or touch icons displayed on the screen and enjoy the demo. 3.
Power Up 3.3 Recovery Procedure The DevStart ends by giving step-by-step instructions on how to recover the Evaluation Kit to the state as it was when shipped by Atmel. Follow the instructions if contents of the NAND Flash or the SPI DataFlash® have been deleted, in order to recover from this situation. 3.4 Sample Code and Technical Support After boot up, designers can run sample code or their own application, on the development kit.
Section 4 Evaluation Kit Hardware 4.1 Introduction The Evaluation Kit is a fully-featured evaluation platform for the Atmel MPU. The Evaluation Kit enables users to extensively evaluate, prototype and create application-specific designs. The Evaluation Kit is a new platform architecture based on a Main Board (MB), a CPU Module (CM) equipped with one of the five processors and an optional Display Module (DM). The Evaluation Kit consists of three boards: 1.
Evaluation Kit Hardware Table 4-1.
Evaluation Kit Hardware 4.2 Computer Module (CM) 4.2.1 CM Board Overview The CM board is the CPU module at the heart of the system. It connects to the EK board through a SODIMM200 interface. It carries the processor and external memories. The CM board serves as a minimal CPU sub-system. All five processors:SAM9G15, SAM9G25, SAM9X25,SAM9G35 and SAM9X35 share the same CM circuitry with minor configuration settings. Note: There are three CM boards from three different manufacturers.
Evaluation Kit Hardware 4.2.2.1 Devices Following is the list of the CM board components: One SAM9 Embedded MPU from the list below – – – – – 4.2.2.2 12 MHz crystal 32.768 KHz crystal 1 Gbit DDR2 memory 2 Gits NAND Flash memory with Chip Selection control switch 32 Mbits SPI Serial DataFlash with Chip Selection control switch 512 Kbits EEPROM 1 Kbyte 1-Wire EEPROM On-board power regulation Two user LEDs Optional PHY Interface Connection 4.2.2.
Evaluation Kit Hardware 4.2.3 Function Blocks 4.2.3.1 Processor The CM Board is equipped with an Atmel ARM-based embedded MPU, as listed below, in a 217-ball BGA package. The five devices share an identical footprint. All five share the same CM Board PCB with minor configuration differences.
Evaluation Kit Hardware 4.2.3.4 Power Supplies The CM Board is driven by +3V3 input power rail from the EK board through the SODIMM200 connector. The CM Board embeds all the necessary power rails required for the micro processor. When additional voltages are required, for example VDDCORE, they are generated on board from the 3.3V supply. The detailed power supply requirements for any given module are specified within the corresponding product documentation.
Evaluation Kit Hardware Figure 4-3. CM Power Supply +3V3 4 MN3 AS1301EHT-adj IN L2 3 LX VDDCORE 2.2uH 3D16 EN C11 22pF 5 FB 2 PWR_EN1 GND C10 4.7uF MN1 AS1301EHT-adj IN C1 4.7uF 1 C3 4.7uF C8 100nF EN L1 3 LX VDDIOM 2.2uH 3D16 C9 22pF 5 FB 2 PWR_EN C12 10uF C7 100nF R4 59K 1% GND 4 R2 39.2K 1% C6 100nF R1 118K 1% C13 100nF C2 10uF C14 100nF C15 100nF R3 59K 1% 1 B2 2 VDDNF C4 100nF 120 OHM@100MHZ C5 100nF L5 10uH/150mA VDDUTMII C38 100nF R22 1R C39 4.
Evaluation Kit Hardware 4.2.3.5 Memory The Device serial processor features a DDR/SDR memory interface and an External Bus Interface (EBI) to enable interfacing to a wide range of external memories and to almost any kind of parallel peripheral.
Evaluation Kit (EK) User Guide PD0/NANDOE PD1/NANDWE PD2/A21/NANDALE PD3/A22/NANDCLE PD4/NCS3 PD5/NWAIT PD6/D16 PD7/D17 PD8/D18 PD9/D19 PD10/D20 PD11/D21 PD12/D22 PD13/D23 PD14/D24 PD15/D25/A20 PD16/D26/A23 PD17/D27/A24 PD18/D28/A25 PD19/D29/NCS2 PD20/D30/NCS4 PD21/D31/NCS5 MN2E SAM9x5_LBGA217 - PIOD NRD NWR0/NWRE NWR1/NBS1 NWR3/NBS3/DQM3 NCS0 NCS1/SDCS SDWE SDCKE SDA10 SDCK #SDCK RAS CAS DQM0 DQM1 DQS0 DQS1 EBI_SDWE EBI_SDCKE EBI_SDA10 EBI_SDCK EBI_NSDCK A12 B12 C8 D11 C11 P13 R14 R13 P15 P12 P1
Evaluation Kit Hardware 4.2.3.6 Serial Peripheral Interface (SPI) Controller The serial processor provides two high-speed Serial Peripheral Interface (SPI) controllers. One port is used to interface with the on-board serial DataFlash®. Figure 4-5. SPI VDDIOP0 R56 470K SW1B SWITCH-2-1.27mm 3 (SPI0_MOSI) R57 (SPI0_MIS0) R58 (SPI0_SPCK) R59 5 2 6 0R 0R 0R 1 (SPI0_NPCS0) ON 2 2 PA14 PA12 PA11 PA13 MN7 AT25DF321 SI SO SCK VCC WP HOLD CS GND 4.2.3.
Evaluation Kit Hardware 4.2.3.9 Optional PHY Some of the device modules provide a location for a 10/100 Ethernet MAC/PHY interface. For more information about the Ethernet controller device, refer to the Davicom DM9161 controller manufacturer's datasheet.
Evaluation Kit Hardware PB[0..18] DNP to remain single PHY connection on EK board 1 2 Y3 OE R70 10K 50MHz VSS VDD OUT 4 3 C71 100nF VDDANA R74 22R 42 7 6 5 26 27 28 29 22R E0_TXCK 2 RR13B 3 RR13C 4 RR13D 6 5 R73 PB4 E0_TX1 E0_TX0 E0_TXEN 3 RR14C 4 RR14D 34 37 17 18 19 20 21 22 PB10 PB9 PB7 E0_RX1 E0_RX0 7 TP27 SMD PB1 PB0 2 RR15B R94 10K R95 DNP 23 30 41 100nF 100nF VDDANA 39 24 25 32 36 35 16 38 R86 1.
Evaluation Kit Hardware 4.2.3.10 SODIMM200 Interface The CM board uses SODIMM200 card edge connector to interface with the EK board. Figure 4-9.
Evaluation Kit Hardware 4.2.4 Configuration 4.2.4.1 Chip Identification The CM board may be equipped with any of the five processors, all sharing an identical BGA217 footprint. There are two resistors on the CM board for the purpose of identifying which of the five is the one actually mounted. The tables below show in detail how the CM board, relative to different processors, determines the dedicated “SELCONFIG” logic. Table 4-5.
Evaluation Kit Hardware 4.2.4.2 Boot Configuration In order to use SAM-BA boot, the NAND Flash and SPI DataFlash must be deselected. SW1 is dedicated to this purpose. Table 4-7. Boot Configuration 4.2.5 Designation Default Setting Feature SW1 (1, 4) ON Set to OFF disables the NAND flash SW1 (2, 3) ON Set to OFF disables the SPI DataFlash Connectors Figure 4-10.
A B C DIBN DIBP {5} HHSDMC HHSDPC {5} {5} {5} HHSDMB HHSDPB {5} {5} BMS HHSDMA HHSDPA {5} {5} {5} PWR_EN {5} 5 R7 R8 R23 R24 R19 R20 VDDIOP0 R11 C1 4.7uF 1 4 27R 27R 39R 39R R16 6.8K 100K 39R 39R PWR_EN EN IN 2 GND U17 P9 B7 U15 U14 T15 T14 FB LX P11 R11 M17 L17 P17 R17 P16 R16 C31 10pF MN1 AS1301EHT-adj 2.
Evaluation Kit (EK) User Guide A B C D EBI_SDWE EBI_SDCKE EBI_SDA10 EBI_SDCK EBI_NSDCK A12 B12 C8 D11 C11 P13 R14 R13 P15 P12 P14 N14 R15 M14 N16 N17 N15 K15 M15 L14 M16 L16 L15 K17 J17 K16 J16 D9 C9 C7 A8 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9 PD10 PD11 PD12 PD13 PD14 PD15 PD16 PD17 PD18 PD19 PD20 PD21 (NANDOE) (NANDWE) (NANDALE) (NANDCLE) (NANDCS) NCS0 EBI_NCS1_SDCS EBI_RAS EBI_CAS B11 C10 B9 B8 EBI_DQM0 EBI_DQM1 EBI_DQS0 EBI_DQS1 EBI_A13 EBI_A14 EBI_A15 EBI_A16 EBI_A17 EBI_A18 EBI_A2 E
11115A–ATARM–27-Jul-11 4-18 A B C D EBI_SDWE EBI_SDCKE EBI_SDA10 EBI_SDCK EBI_NSDCK A12 B12 C8 D11 C11 P13 R14 R13 P15 P12 P14 N14 R15 M14 N16 N17 N15 K15 M15 L14 M16 L16 L15 K17 J17 K16 J16 D9 C9 C7 A8 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9 PD10 PD11 PD12 PD13 PD14 PD15 PD16 PD17 PD18 PD19 PD20 PD21 (NANDOE) (NANDWE) (NANDALE) (NANDCLE) (NANDCS) NCS0 EBI_NCS1_SDCS EBI_RAS EBI_CAS B11 C10 B9 B8 EBI_DQM0 EBI_DQM1 EBI_DQS0 EBI_DQS1 EBI_A13 EBI_A14 EBI_A15 EBI_A16 EBI_A17 EBI_A18 EBI_A2 EBI
A B 7 6 8 7 8 2 RR15B 3 RR15C 1 RR14A 2 RR14B 1 RR15A E0_RXDV E0_RXER E0_MDC E0_MDIO E0_INTR PB3 PB2 PB6 PB5 PB8 5 {1,5} 6 5 7 6 5 3 RR14C 4 RR14D 2 RR13B 3 RR13C 4 RR13D 22R E0_RX1 E0_RX0 E0_TX1 E0_TX0 E0_TXEN PB10 PB9 PB7 R73 PB1 PB0 E0_TXCK PB4 Install as need to alter PHYaddress, must override internal pullup on SAM9x5 PB[0..18] NRST VDDANA RR7 10KX4 4 8 7 6 5 1 2 3 4 RR8 10KX4 2 1 VSS 50MHz OE Y3 OUT VDD VDDANA 3 4 DNP 4.
11115A–ATARM–27-Jul-11 4-20 A B C D PB[0..18] PC[0..31] {3} PA[0..
Evaluation Kit Hardware 4.3 EK Board Description 4.3.1 EK Board Overview The EK board serves as the main board that carries the CPU module. It features all necessary peripherals and interfaces for processor evaluation. Figure 4-16.
Evaluation Kit Hardware 4.3.2 Equipment List Based on the processor installed on the CM board, the EK board is equipped with the following interfaces or peripherals: 4.3.2.1 Devices List of the EK board peripherals: 4.3.2.2 4.3.2.
Evaluation Kit Hardware 4.3.3 Function Blocks 4.3.3.
Evaluation Kit Hardware Figure 4-17. SODIMM Interface on EK Board 3V3 USBC_DP USBC_DM USBB_DM USBB_DP DIBP DIBN USBA_DM USBA_DP 3V3 CON1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 VCC1 VCC3 GND1 USBC_DP USBC_DM GND3 USBB_DM USBB_DP GND4 DIBP DIBN GND5 USBA_DM USBA_DP GND6 RFU1 RFU3 RFU5 RFU7 RFU9 VCC2 VCC4 VBAT JTAGSEL WKUP SHDN BMS nRST nTRST TDI TCK TMS TDO RTCK PWR_EN RFU2 RFU4 RFU6 RFU8 RFU10 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 VDDIOP0 R83 4.
Evaluation Kit Hardware 4.3.3.2 Power Supplies The EK Board features one adjustable LDO. It accepts DC 5V power input and outputs a regulated +3.3V to most other circuits on the board through four 3.3V rails. VDDPIO0 VDDPIO1 VDDANA VDDISI This LDO is enabled through a dual FET scheme. The processor can assert SHDN (which is a VDDBUpowered I/O) to shut down the LDO to enter the so-called backup mode. The regulator on CM board is also shut down by the action of the SHDN signal.
Evaluation Kit Hardware There is another 3.3V rail, VDDNF, supplied from the CM board. VDDNF is set to 3.3V in the current CM design. The processors also support a 1.8V NAND Flash device, in which case VDDNF is set to 1.8V. In order to avoid potential voltage conflict on user-defined applications, a level shifter is inserted between the PIO lines on VDDNF rail and the 3.3V application. Figure 4-19.
Evaluation Kit Hardware 4.3.3.4 DBGU The UART is connected to the DB-9 male socket through an RS-232 Transceiver (TXD and RXD only). A jumper, JP11, is used to select DBGU or CAN0 between IO (PA9, PA10) sharing scheme. Close JP11 to select DBGU. Figure 4-21.
Evaluation Kit Hardware 4.3.3.5 USART The USART0 and USART3 are used as serial communication ports. Both USARTs are buffered with an RS-232 Transceiver (TXD, RXD and handshake CTS/RTS control) and connected to the DB-9 male socket. The software must assign the appropriate PIO pins to enable the USART function. The USART3 is only supported by SAM9G25 and SAM9X25 processors. The RS-232 Transceiver for USART3 is enabled by the signal SELCONFIG comprised of a pull down resistor on CM board. Ref to Section 4.4.
Evaluation Kit Hardware 4.3.3.6 USB Ports The Evaluation Kit features three USB communication ports: Port A Host High Speed (EHCI) and Full Speed (OHCI) multiplexed with USB Device High speed Micro AB connector, J20 Port B Host High Speed (EHCI) and Full Speed (OHCI) standard type A connector, J19 upper port Port C Host Full speed OHCI only standard type A connector, J19 lower port All three USB Host ports are equipped with 500 mA high-side power switch for self-powered and buspowered applications.
Evaluation Kit Hardware 4.3.3.7 Ethernet 10/100 (EMAC) Port Except for SAM9G15, the processor has two 10/100 Mbps Ethernet Mac Controllers. EMAC SAM9G15 SAM9G35 SAM9X35 SAM9G25 SAM9X25 – RMII RMII MII MII + RMII The EK board is equipped with two Davicom DM9161AEP PHYs for each Ethernet port. Both PHY Transceivers are configured as RMII mode. Both PHY transceivers have an RJ45 port with embedded transformer and three-status LEDs. By default, the ETH0 interface is implemented on the EK board.
PB6 PB5 PB8 PB1 PB0 PB3 PB2 PB10 PB9 PB7 1 2 3 4 R219 R220 R221 E0_MDC E0_MDIO E0_INTR 22R RR17 1 2 3 4 8 7 6 5 22R NRST 22R 22R 22R 8 7 6 5 22R RR18 R218 E0_RX1 E0_RX0 E0_RXDV E0_RXER E0_TX1 E0_TX0 E0_TXEN E0_TXCK RR8 10k RR7 10k JP12 VDDANA RR6 10k VDDANA 0R R105 3 4 8 7 6 5 1 2 3 4 PB4 OUT VDD VSS 50MHz OE Y1 8 7 6 5 1 2 3 4 2 1 8 7 6 5 1 2 3 4 2 100n R117 EARTH_ETH0 C87 10u 10V RESET 0R PWRDWN DGND DGND DGND DVDD DVDD DVDD DISMDIX MDC MDIO MDINTR BG
Evaluation Kit Hardware Ethernet 1 is only available for SAM9X25. The PHY on Ethernet 1 is enabled by the SELCONFIG signal from a pull-down resistor on the CM board. Refer to Section 4.4.1 ”DM Board Overview” for detail. Some pins (PC16, PC20, PC21, PC28, PC26 and PC29) are configured as Ethernet 1 input from PHY for SAM9X25, whereas they are configured as LCD data pins on other processors.
PC30 PC31 PC26 PC21 PC20 PC28 PC16 1 2 3 4 1 2 3 4 SELCONFIG PC29 PC19 PC18 PC27 E1_TXCK E1_INTR E1_RXER 1 2 3 4 5 6 7 8 9 10 0R 74AC244SC GND OE1 I0 O4 I1 O5 I2 O6 I3 O7 MN17 C100 10u 10V R136 VDDIOP1 E1_CRSDV E1_RX0 L20 220ohm at 100MHz 1 2 8 7 6 5 8 7 6 5 E1_RX1 EARTH_ETH1 22R RR12 22R RR10 SELCONFIG 8 7 6 5 E1_INTR SELCONFIG E1_TXCK E1_MDC E1_MDIO E1_INTR 20 19 18 17 16 15 14 13 12 11 VDDIOP1 GND_ETH1 VCC OE2 O0 I4 O1 I5 O2 I6 O3 I7 E1_TXCK E1_TX1 E1_TX0 E1_TXEN C114 1
11115A–ATARM–27-Jul-11 4-34 2 1 C61 470p 1 AUDIO_GND 3 2 R162 R91 47k C60 C59 0R DNP 470p C44 C121 22p 220uF/10V 220uF/10V AUDIO_GND AUDIO_GND 470p C41 AUDIO_GND R90 47k L7 220ohm at 100MHz 1 2 AUDIO_GND 5.6K R81 AUDIO_GND 5.6K R80 R78 5.6K L6 220ohm at 100MHz 1 2 C62 470p AUDIO_GND C43 470p L4 220ohm at 100MHz 1 2 22R DNP L3 R74 220ohm at 100MHz 5.6K 1 2 PCK0 + 4 STEREO_3.5mm J15 5 HEADPHONE C42 4 3 470p STEREO_3.
Evaluation Kit Hardware 4.3.3.9 1-Wire EEPROM The EK board also features a 1-Wire device acting as a “firmware label” to store information like chip type, manufacturer’s name, production date etc. Figure 4-28. 1-Wire on EK VDDANA R144 1.5k R145 ONE_WIRE PB18 2 0R MN16 I/O 1 GND NC1 NC2 NC3 NC4 3 4 5 6 DS2431P 4.3.3.10 CAN Bus Two boards, the SAM9X35-EK and SAM9X25-EK, feature two Controller Area Network (CAN) ports with transceiver. CAN0 uses the same IOs (PA9, PA10) as the DBGU.
DIBP DIBN 0R R167 150pF C71 0R R166 0R can be replaced by bead to improve EMI 150pF C72 4 1 LAN0066-50 3 TX1 2 C70 47pF DAA_GND C73 100n DVDD DAA_GND C66 100n DAA_GND C65 100n DVDD DIBP DIBN AVDD PWR TEST DAA_GND C74 100n 1 14 16 2 15 13 7 8 9 10 6 11 5 R93 0805 6.81M R99 1 DAA_GND R102 110R MMBAT42 Q3 100R 1 DAA_GND 6.
Evaluation Kit Hardware 4.3.3.12 SD/MMC Interface The Evaluation Kit has two high-speed MultiMedia Card Interfaces (MCI). The first interface is used as a 4-bit interface (MCI0), connected to a MicroSD card slot. The second interface is used as a 4-bit interface (MCI1), connected to an SD/MMC card slot. The memory card is not included in the Evaluation Kit. Please note that the power is connected to VCC, which is 3.3 volts. Figure 4-31.
Evaluation Kit Hardware 4.3.3.13 ZigBee The EK board has a 10-pin male connector for the Atmel RZ600 ZigBee module. DNP 0 Ohm resistors have been implemented in series with the PIO lines that are used elsewhere in the design. Thereby, enable their individual disconnections, should a conflict occur in user application. Figure 4-32.
Evaluation Kit Hardware Figure 4-34.
Evaluation Kit Hardware 4.3.4.3 Force Power ON Configuration Table 4-11. Force Power ON 4.3.4.4 Designation Default Setting JP5 Close Feature Keep on-board regulator always on Open to feature SHDN function White Protection Configuration on MCI1 Table 4-12. Write Protection on MCI1 4.3.4.5 Designation Default Setting JP6 Close Feature MCI1 write protect selected Open to disable protection Selection between DBGU and CAN Table 4-13. Select DBGU or CAN 4.3.4.
Evaluation Kit Hardware 4.3.4.8 PIO Usage Table 4-16.
Evaluation Kit Hardware Table 4-17.
Evaluation Kit Hardware Table 4-18.
Evaluation Kit Hardware Table 4-19.
Evaluation Kit Hardware 4.3.5 Connectors 4.3.5.1 Power Supply Figure 4-35. Power Supply Connector J4 Table 4-20. Power Supply Connector J2 Signal Description 4.3.5.2 Pin Mnemonic Signal description 1 Center +5V 2 GND 3 Floating SODIMM Card Edge Socket The Evaluation Kit uses a SODIMM200 standard connector for CM board interfacing. Please note that this is not an industry standard pin-out and that it is unlikely to be compatible with offthe-shelf SODIMM cards. Figure 4-36.
Evaluation Kit Hardware Table 4-21.
Evaluation Kit Hardware Table 4-21.
Evaluation Kit Hardware Table 4-21.
Evaluation Kit Hardware Table 4-21.
Evaluation Kit Hardware Table 4-21.
Evaluation Kit Hardware Table 4-22. JTAG/ICE Connector J13 Signal Descriptions Pin Mnemonic Description 1 VTref. 3.3V power This is the target reference voltage. It is used to check if the target has power, to create the logic-level reference for the input comparators, and to control the output logic levels to the target. It is normally fed from VDD on the target board and must not have a series resistor. 2 Vsupply. 3.3V power This pin is not connected in SAM-ICE.
Evaluation Kit Hardware 4.3.5.4 USB Type A Dual Port Figure 4-38. USB Type A Dual Port J19 Table 4-23.
Evaluation Kit Hardware 4.3.5.5 USB Micro AB Figure 4-39. USB USB Host/Device Micro AB Connector J20 Table 4-24. USB USB Host/Device Micro AB Connector J20 Signal Descriptions 4.3.5.6 Pin Mnemonic Description 1 Vbus 5v power 2 DM Data minus 3 DP Data plus 4 ID On the Go Identification 5 GND Common ground DBGU Figure 4-40. DBGU Connector J11 Table 4-25.
Evaluation Kit Hardware 4.3.5.7 RS232 Connector with RTS/CTS Handshake Support Figure 4-41. USART Connector J12, J13 Table 4-26.
Evaluation Kit Hardware 4.3.5.8 DAA RJ11 Socket (6P4C) Figure 4-42. DAA RJ11 Socket J16 Table 4-28. DAA RJ11 Socket J16 Signal Descriptions Pin Mnemonic 1, 2, 5, 6 4.3.5.9 Description NO CONNECTION 3 RAC RING side of ordinary telephone line 4 TAC TIP side of ordinary telephone line CAN RJ12 Socket (6P6C) Figure 4-43. CAN RJ12 Socket CON2, CON3 Table 4-29.
Evaluation Kit Hardware 4.3.5.10 MicroSD MCI0 Figure 4-44. MicroSD Socket J6 Table 4-30. MicroSD Socket J6 Signal Descriptions Pin Mnemonic Description 1 DAT2 Data Bit 2 2 CD/DAT3 Card Detect/Data Bit 3 3 CMD Command Line 4 VCC Supply Voltage 3.3V 5 CLK Command Line 6 VSS Common ground 7 DAT0 Data Bit 0 8 DAT1 Data Bit 1 9 SW1 No use, grounded 10 CARD DETECT CARD DETECT 4.3.5.11 SD/MMC MCI1 Figure 4-45. SD/MMC Socket J7 Table 4-31.
Evaluation Kit Hardware Table 4-31.
Evaluation Kit Hardware 4.3.5.13 ZigBee Socket J10 Figure 4-47. ZigBee Socket J10 Table 4-33. ZigBee Socket J10 Signal Descriptions Signal Name Function Reset Port /RST Pin 1 Pin Port Signal Name 2 Function Misc. Interrupt Request IRQ 3 4 SLP_TR SLP_TR SPI chip select /SEL 5 6 MOSI SPI MOSI SPI MISO MISO 7 8 SCLK SPI CLK Power Supply GND 9 10 VCC VCC GND VCC Option on misc.
Evaluation Kit Hardware Table 4-34. LCD/ISI Socket J21 Signal Descriptions (Continued) LCD ISI Pin Num Pin Num ISI LCD GND GND 15 16 ISI_PCK LCDDAT12 GND GND 17 18 ISI_D0 LCDDAT0 LCDDAT1 ISI_D1 19 20 ISI_D2 LCDDAT2 LCDDAT3 ISI_D3 21 22 ISI_D4 LCDDAT4 LCDDAT5 ISI_D5 23 24 ISI_D6 LCDDAT6 LCDDAT7 ISI_D7 25 26 ISI_D8 LCDDAT8 LCDDAT9 ISI_D9 27 28 ISI_D10 LCDDAT10 LCDDAT11 ISI_D11 29 30 GND GND 4.3.5.15 LCD/TSC Socket J22 Figure 4-49.
Evaluation Kit Hardware 4.3.5.16 IO Expansion Port J1 Figure 4-50. IO Expansion Socket J1 Table 4-36.
Evaluation Kit Hardware 4.3.5.17 IO Expansion Port J2 Figure 4-51. IO Expansion Socket J2 Table 4-37.
Evaluation Kit Hardware 4.3.5.18 IO Expansion Port J3 Figure 4-52. IO Expansion Socket J3 Table 4-38.
5 PIO C PIO B&D PIO CONNECTOR PIO CONNECTOR Sheet 3 PIO A PIO A,...
11115A–ATARM–27-Jul-11 4-64 A B C D 2010.07 2010.10 A B SECOND RELEASED ORIGINAL RELEASED NOTE 3.
A B C D PA25 PA27 PA29 PC0 PC2 PC4 PC7 PC9 PC11 PC12 PC14 PC17 PC19 PC21 PC22 PC24 PC26 PC29 PC31 VDDANA PB0 PB2 PB4 PB6 PB8 PB9 PB11 PB13 PB15 PB17 PB18 {8} {8} {8} {14} {14} {14} {14} {14} {14} {14} {14} {14} {11,14} {11,14} {7,14} {7,14} {11,14} {11,14} {11} {10} {10} {10} {10} {10} {10} {14} {14} {14} {12} {13,14} PA16 PA18 PA20 PA5 PA10 {5} {5} {5} {6} {6,7} {6,7,14} {5,7} {5} {5} {5,6,14} PA8 PA22 PA31 PA0 PA2 PA4 PA11 PA13 {5} {12,14} {12} {12} {6,14} {8,14} PD10 PD12 PD14 PD16 PD18 PD20
A B C {3} 100n C57 SHDN SIP2 FORCE POWER ON JP5 5 2 R7 10k 3 4 5V {3,7} Z6 Bumpon Z8 Bumpon 5V C3 100n R8 10k Z7 Bumpon Z9 Bumpon C6 10u Z17 4 Bumpon CB PSG CG1 CG2 CG3 B PGOOD EN VIN VDD MN3 RT9018A C7 1u 1 2 3 4 R1 100k 3V3 3 1 MN2 BNX002-01 C22 1u Place C22 near MN3.
A B C PA16 PA20 PA19 {3} {3} {3} PA2 PA11 {3} {3} {3,7} PA12 PA4 PA3 {3,6,14} PA13 {3,7} {3} PD14 PA17 {3} {3} PA18 PA15 PD15 {3} {3} {3} 5 RR2 1 2 3 4 RR1 1 2 3 4 27R 8 7 6 5 27R 8 7 6 5 4 68k 68k 68k 68k R10 R11 R12 R13 SIP2 JP6 2 1 2 3 4 8 RR5 7 27R 6 5 RR4 27R 1 8 2 7 3 6 4 5 68k 68k 68k 68k R15 R16 R17 R18 4 RR4,RR5 near SODIMM place (MCI1_CDA) (MCI1_DA3) (MCI1_DA2) (MCI1_CK) (MCI1_DA1) (MCI1_DA0) (MCI1_WP) (MCI1_CD) 1 RR1,RR2 near SODIMM place (MCI0_CDA) (MC
11115A–ATARM–27-Jul-11 4-68 A B C D 5 5 PA9 {3,7} PA5 PA6 {3} {3} CANRX0 3 2 1 Y 2 4 6 8 10 12 14 16 18 20 CANRX1 VDDIOP0 CANTX1 4 R35 1 3 5 7 9 11 13 15 17 19 DNP 100k R47 R52 R56 R55 R82 1 3 5 7 9 DNP 100k R49 0R 0R 0R 0R 0R DNP 100k R48 DNP DNP DNP DNP 0R 0R R33 R37 10k 0R 10k R32 10k VDDIOP0 R20 R54 DNP 100k R46 VDDIOP0 PD16 ZB_IRQ1 SPI1_NPCS1 SPI1_MISO VDDIOP0 BR20-H J9 VDDIOP0 ICE INTERFACE {12} ZB_RSTN {3,5,14} PA13 {3,7,14} PA0 {3,14} PA21
A B C D 5 PA3 PA1 {3,5} {3} 0R 0R 0R 0R R27 R28 R30 R31 RTS0 TXD0 CTS0 RXD0 R23 47k R22 47k VDDIOP0 PC25 PC23 DEBUG PORT {3} {3,14} {3,11,14} SELCONFIG {3,14} PC24 {3,14} PC22 {6} SEL_CAN {3,6} PA9 PA10 4 0R 0R R69 R70 CTS3 RXD3 {3,6} 0R 0R R65 R66 RTS3 TXD3 47k VDDIOP0 DRXD R73 R71 100k 0R 0R C36 100n 3 C3- C3+ C2- C2+ C1- 6 C1+ C2- SD 3 ADM3222ARW R2 V- V+ GND VCC R1 T2 T1 MN8 1 EN 10 13 11 C3- C3+ C2- C2+ C1- C1+ 15 14 13 18 17 16
11115A–ATARM–27-Jul-11 4-70 5 C42 470p 1 3 2 C61 470p 1 AUDIO_GND 4 STEREO_3.5mm J15 5 HEADPHONE L7 220ohm at 100MHz 1 2 4 AUDIO_GND 5.6K R91 47k C60 C59 0R DNP 470p C44 C121 22p 220uF/10V 220uF/10V AUDIO_GND AUDIO_GND 470p C41 AUDIO_GND R90 47k AUDIO_GND 5.6K R81 R162 R164 near SODIMM R162 near CODEC R80 R78 5.6K L6 220ohm at 100MHz 1 2 C62 470p AUDIO_GND C43 470p L4 220ohm at 100MHz 1 2 22R DNP L3 R74 220ohm at 100MHz 5.
DIBP {3} A B DIBN C {3} 5 0R R167 150pF C71 0R R166 0R can be replaced by bead to improve EMI 150pF C72 4 1 LAN0066-50 3 TX1 2 C70 47pF 4 DAA_GND C73 100n DVDD DAA_GND C66 100n DAA_GND C65 100n DVDD DIBP DIBN AVDD PWR TEST DAA_GND C74 100n 1 14 16 2 15 12 MN11 13 7 8 9 10 6 11 5 R93 6.81M R99 3 1 DAA_GND R102 110R MMBAT42 Q3 100R 1 DAA_GND 6.
DIBP {3} A B DIBN {3} C D 5 0R R167 150pF C71 0R R166 0R can be replaced by bead to improve EMI 150pF C72 4 1 LAN0066-50 3 TX1 2 C70 47pF 4 DAA_GND C73 100n DVDD DAA_GND C66 100n DAA_GND C65 100n DVDD DIBP DIBN AVDD PWR TEST DAA_GND C74 100n 1 14 16 2 15 12 MN11 13 7 8 9 10 6 11 5 R93 6.81M R99 3 1 DAA_GND R102 110R MMBAT42 Q3 100R 1 DAA_GND 6.
A B C PB1 PB0 PB3 PB2 PB6 PB5 PB8 {3} {3} {3} PB10 PB9 PB7 {3,8} {3} {3} {3} {3} {3} {3} PB4 8 R219 R220 R221 E0_MDC E0_MDIO E0_INTR 22R 22R 22R 22R 8 7 6 5 {3,6,11,13} NRST 1 2 3 4 8 7 6 5 22R RR18 22R RR17 1 2 3 4 R218 E0_RX1 E0_RX0 E0_RXDV E0_RXER E0_TX1 E0_TX0 E0_TXEN E0_TXCK 7 RR8 10k JP12 VDDANA RR7 10k 0R 3 4 RR6 10k VDDANA R105 VDD OUT 8 7 6 5 1 2 3 4 {3} VSS 50MHz OE 8 7 6 5 1 2 3 4 2 1 Y1 10k 2 1 100n 6 40 10 15 33 44 23 30 41 L19 220ohm at
PC30 PC31 PC26 {3,14} {3} {3,14} A B PC21 PC20 PC28 PC16 {3,7,14} SELCONFIG PC29 PC19 PC18 PC27 C {3,14} {3,14} {3,14} {3,14} {3,14} {3,14} {3,14} {3,14} 1 2 3 4 1 2 3 4 E1_TXCK 5 22R RR12 22R RR10 8 7 6 5 8 7 6 5 E1_INTR E1_RXER E1_CRSDV E1_RX0 E1_RX1 SELCONFIG 8 7 6 5 1 2 3 4 5 6 7 8 9 10 74AC244SC GND OE1 I0 O4 I1 O5 I2 O6 I3 O7 MN17 VCC OE2 O0 I4 O1 I5 O2 I6 O3 I7 E1_INTR SELCONFIG E1_TXCK E1_MDC E1_MDIO E1_INTR 20 19 18 17 16 15 14 13 12 11 VDDIOP1 E1_TXCK E1_TX1 E1_TX0
Evaluation Kit (EK) User Guide A B C J19 1 2 EARTH_USB 3 4 B1 B2 B3 B4 5 6 EARTH_USB EARTH_USB 7 {14} VBUS DM DP ID GND 1 2 3 4 5 G3515-09010101-00 J20 5V_INTER USB A HOST/DEVICE INTERFACE EARTH_USB L21 220ohm at 100MHz 1 2 B A Dual USB A A1 A2 A3 A4 SHD D USB HOST B&C INTERFACE 5 C109 100n C107 100n C105 100n C102 100n 2 L13 2 1 L14 2 220ohm at 100MHz 1 1 2 82k 4 5V R139 47k (VBUS_SENSE) + C110 220ohm at 100MHz 33u C111 15p R138 L12 + C106 220ohm at 100MH
4-76 A B C D VBAT BP2 BP1 {3,14} PB18 5 ONE_WIRE ONE WIRE EEPROM WAKE UP NRST {3,4} PUSH BUTTON R145 R141 100k 4 3V3 4 0R 1 2 R144 1.5k VDDANA R142 1.5k NC1 NC2 NC3 NC4 DS2431P GND I/O MN16 {3,6,10,11} 3 4 5 6 3 WAKE UP {3} NRST 3 {3} C112 100n 3V 1/1 MODIF. SCALE REV B A C113 2.2u JP14 DES. DATE 2 1 SHEET 13 14 B DATE XX-XXX-XX XX-XXX-XX REV. VER. X.X X.X D6 LM4040BIM3-3.0+T R143 1.
Evaluation Kit (EK) User Guide A B C D 4 PC24 PC27 PC29 PB11 PB13 PB15 {3,7} {3,11} {3,11} {3} {3} {3} 5 {3,6} PA21 {3,6} PA23 {3,7,11} SELCONFIG {3,12} PD16 PC16 PC18 PC20 PC22 PC1 PC3 PC5 PC7 PC9 PC11 {3,11} {3,11} {3,11} {3,7} {3} {3} {3} {3} {3} {3} {4} VDDISI {3,6} PA7 {3,8} PA31 DNP 0R 0R 0R 0R R156 R158 R160 R163 R187 0R 0R 0R 22R 22R 22R R208 R209 R210 R150 R152 R154 22R 22R 22R 22R PB18 0R 0R 0R 22R 22R 22R 22R 22R 22R R204 R205 R206 R207 {12} 5V_INTER R188 R189 R190 R
Evaluation Kit Hardware 4.4 Optional Display Module (DM) Board Hardware 4.4.1 DM Board Overview The optional DM board carries a 5.0" TFT LCD module with touch screen. The DM board also carries four QTouch pads. Figure 4-54. DM Board Layout 4.4.2 Equipment List The list of the DM board components follows: One 5.0" TFT LCD module LCD Back light driver 3.3V regulator QTouch device 1-Wire device 4.4.3 Function Blocks 4.4.3.1 3.
Evaluation Kit (EK) User Guide 5'' LCD, 800(H)×RGB×480(V) FL500WVR00-A0T FOXLINK PIN 45 PIN 1 J1 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 C5 100n X_RIGHT Y _LOW X_LEFT Y _UP C6 10u 3V3_LCD BLUE7 BLUE6 BLUE5 BLUE4 BLUE3 BLUE2 BLUE1 BLUE0 GREEN7 GREEN6 GREEN5 GREEN4 GREEN3 GREEN2 GREEN1 GREEN0 RED7 RED6 RED5 RED4 RED3 RED2 RED1 RED0 LCDPCK LCDDEN LCDVSY NC LCDHSY NC VLED+ VLED- RED[0..7] GREEN[0..7] BLUE[0..
Evaluation Kit Hardware 4.4.3.3 Back Light The back light voltage is generated from a CP2122ST boost converter. It is powered directly by the DC 5V from the EK board. The back light level is controlled by a PWM signal generated from the MPU Device processor. Figure 4-57. Back Light Control L1 22uH 880mA 5V_INTER RB160M-60 60V/1A 5 4 LCDPWM 24.5V/40mA VLED+ D1 5V/217mA C7 10u 10V MN1 VIN SW GND SHDN# FB C9 2.2u 50V 1 2 3 CP2122ST 300mV VLED- R40 10k R41 7R5 2 x 7 LEDs Back Light 2*20mA, 24.
Evaluation Kit Hardware 4.4.3.5 1-Wire The DM board also uses a 1-Wire device as “firmware label” to store the information such as chip type, manufacturer’s name, production date etc. Figure 4-59. 1-Wire on DM 3V3_LCD R45 4.
A B C D FOXLINK 4 5 CP2122ST SHDN# VIN MN1 L1 22uH 880mA SW GND FB 1 2 3 C13 100n 5 C15 2.2u 3 2 1 BYP VOUT 4 5 C10 10u RB160M-60 60V/1A D1 PIN 1 SPX3819 500mA capability EN GND VIN MN3 2*20mA, 24.
Section 5 Revision History 5.1 Revision History Table 5-1. Document Comments 11115A First issue. Evaluation Kit (EK) User Guide Change Request Ref.
Headquarters International Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: (+1) (408) 441-0311 Fax: (+1) (408) 487-2600 Atmel Asia Limited Unit 01-5 & 16, 19F BEA Tower, Millennium City 5 418 Kwun Tong Road Kwun Tong, Kowloon HONG KONG Tel: (+852) 2245-6100 Fax: (+852) 2722-1369 Atmel Munich GmbH Business Campus Parkring 4 D-85748 Garching b. Munich GERMANY Tel: (+49) 89-31970-0 Fax: (+49) 89-3194621 Atmel Japan 9F, Tonetsu Shinkawa Bldg.
