Datasheet

43
AT8xC51SND1C
4109E–8051–06/03
Table 54. IPH1 Register
IPH1 (S:B3h) – Interrupt Priority High Register 1
Reset Value = 0000 0000b
76543210
- IPHUSB - IPHKB IPHADC IPHSPI IPHI2C IPHMMC
Bit
Number
Bit
Mnemonic Description
7-
Reserved
The value read from this bit is always 0. Do not set this bit.
6 IPHUSB
USB Interrupt Priority Level MSB
Refer to Table 49 for priority level description.
5-
Reserved
The value read from this bit is always 0. Do not set this bit.
4IPHKB
Keyboard Interrupt Priority Level MSB
Refer to Table 49 for priority level description.
3IPHADC
A to D Converter Interrupt Priority Level MSB
Refer to Table 49 for priority level description.
2IPHSPI
SPI Interrupt Priority Level MSB
Refer to Table 49 for priority level description.
1IPHI2C
Two Wire Controller Interrupt Priority Level MSB
Refer to Table 49 for priority level description.
0IPHMMC
MMC Interrupt Priority Level MSB
Refer to Table 49 for priority level description.